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Chapter 3: Hardware
CAN-Engine
3-10
A number of different data rates are defined, with 1Mbps (Bits per second) being the top end, and 10kbps
the minimum rate. Cable length depends on the data rate used. Normally all the devices in a system transfer
uniform and fixed bit-rates. The maximum line length is 1Km, 40 meters at 1Mbps. Termination resistors
are used at each end of the cable. The worst-case transmission time of an 8-byte frame with an 11-bit
identifier is 134 bit times (that's 134 microseconds at the maximum baud rate of 1Mbits/sec).
The CAN Bus interface uses an asynchronous transmission scheme controlled by start and stop bits at the
beginning and end of each character. This interface is used, employing serial binary interchange.
Information is passed from transmitters to receivers in a data frame. The data frame is composed of an
Arbitration field, Control field, Data field, CRC field, ACK field. The frame begins with a 'Start of frame'
[SOF], and ends with an 'End of frame' [EOF] space. The data field may be from 0 to 8 bits.
The CAN bus pinout on J3 is shown below. It is a compact 0.1” spacing 3x2 pin header. User can use a
IDE10-DB9 flat cable from TERN to connect CAN signals to an external standard DB9 CAN connector in
the field.
3.5.5
100 MHz BaseT Ethernet
An WizNet™ Fast Ethernet Module can be installed to provide 100M Base-T network connectivity. This
Ethernet module has a hardware LSI TCP/IP stack. It implements TCP/IP, UDP, ICMP and ARP in
hardware, supporting internet protocol DLC and MAC. It has 16KB internal transmit and receiving buffer
which is mapped into host processor’s direct memory. The host can access the buffer via high speed DMA
transfers. The hardware Ethernet module releases internet connectivity and protocol processing from the
host processor. It supports 4 independent stack connections simultaneously at a 4Mbps protocol
processing speed. An RJ45 8-pin connector is on-board for connecting to 10/100 Base-T Ethernet network.
A software library is available for Ethernet connectivity.
3.5.6
Dual 12-bit DAC (LTC1446)
The LTC1446/LTC1446L is a dual 12-bit digital-to-analog converter (DAC) in an SO-8 package. It is
complete with a rail-to-rail voltage output amplifier, an internal reference and a 3-wire serial interface. The
LTC1446 outputs a full-scale of 4.096V, making 1 LSB equal to 1 mV. The LTC1446L outputs a full-scale
of 2.5 V, making 1 LSB equal to 0.61 mV. The buffered outputs can source or sink 5 mA.
The DAC (U0) outputs are routed to J3 pin 9 for channel A, and pin 10 for channel B.