CAN-Engine
Chapter 3: Hardware
3-3
Important Note: For 80MHz CAN Engine, DMA functions are not available when by default low power 55
ns SRAM is installed. If install a 25 ns SRAM, 80MHz CANE can have all DMA functions, but it will
drain the backup battery fast. Two battery positive pads allowing the battery be installed:
1) Support both RTC and low power SRAM, or
2) Support only RTC.
3.2.4
Timer Control Unit
The timer/counter unit has three 16-bit programmable timers: Timer0, Timer1, and Timer2.
Timer0 and Timer1 are connected to external pins:
Timer0 output = P10 = J2 pin 12
Timer0 input = P11 = U7 EE pin 5
Timer1 output = P1 = J2 pin 29
Timer1 input = P0 = J2 pin 20
Timer0 input P11 is used and shared by on-board EE, LED, and HitWD, not recommended for other
external use.
The timer can be used to count or time external events, or can generate non-repetitive or variable-duty-cycle
waveforms.
Timer2 is not connected to any external pin. It can be used as an internal timer for real-time coding or time-
delay applications. It can also prescale timer 0 and timer 1 or be used as a DMA request source.
The maximum rate at which each timer can operate is 10 MHz, since each timer is serviced once every
fourth clock cycle. Timer output takes up to six clock cycles to respond to clock or gate events. See the
sample programs timer02.c and ae_cnt1.c in the
tern\186\samples\ae
directory.
3.2.5
PWM outputs and PWD
The Timer0 and Timer1 outputs can also be used to generate non-repetitive or variable-duty-cycle
waveforms. The timer output takes up to 6 clock cycles to respond to the clock input. Thus the minimum
timer output cycle is 25 ns x 6 = 150 ns (at 40 MHz).
Each timer has a maximum count register that defines the maximum value the timer will reach. Both Timer0
and Timer1 have secondary maximum count registers for variable duty cycle output. Using both the primary
and secondary maximum count registers lets the timer alternate between two maximum values.
MAX. COUNT A
MAX. COUNT B
Pulse Width Demodulation can be used to measure the input signal’s high and low phases on the /INT2=J2
pin 19.
3.2.6
Power-save Mode
The power-save mode of the Am186ES reduces power consumption and heat dissipation, thereby extending
battery life in portable systems. In power-save mode, operation of the CPU and internal peripherals
continues at a slower clock frequency. When an interrupt occurs, it automatically returns to its normal
operating frequency.
