Terasic VEEK-MT-C5SOC Скачать руководство пользователя страница 14 | Manualshive

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12

LCD_G3

D11

LCD green data bus bit 3

2.5V

LCD_G4

D9

LCD green data bus bit 4

2.5V

LCD_G5

E9

LCD green data bus bit 5

2.5V

LCD_G6

B5

LCD green data bus bit 6

2.5V

LCD_G7

B6

LCD green data bus bit 7

2.5V

LCD_HSD

C12

Horizontal sync input.

2.5V

LCD_MODE

G8

DE/SYNC mode select

2.5V

LCD_POWER_CTL

G10

LCD power control

2.5V

LCD_R0

A13

LCD red data bus bit 0

2.5V

LCD_R1

B13

LCD red data bus bit 1

2.5V

LCD_R2

C9

LCD red data bus bit 2

2.5V

LCD_R3

C10

LCD red data bus bit 3

2.5V

LCD_R4

B8

LCD red data bus bit 4

2.5V

LCD_R5

C8

LCD red data bus bit 5

2.5V

LCD_R6

A8

LCD red data bus bit 6

2.5V

LCD_R7

A9

LCD red data bus bit 7

2.5V

LCD_RSTB

B1

Global reset pin

2.5V

LCD_SHLR

B3

Left or Right Display Control

2.5V

LCD_UPDN

B2

Up / Down Display Control

2.5V

LCD_VSD

B11

Vertical sync input.

2.5V

TOUCH _I2C_SCL

F14

touch I2C clock

2.5V

TOUCH _I2C_SDA

F15

touch I2C data

2.5V

TOUCH _INT_n

B12

touch interrupt

2.5V

3

3

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.

3

3

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g

5

5

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-

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g

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x

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D

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The VEEK-MT-C5SOC is equipped with a 5-megapixel digital image sensor that provides an active
imaging array of 2,592H x 1,944V. It features low-noise CMOS imaging technology that achieves
CCD image quality. In addition, it incorporates sophisticated camera functions on-chip such as
windowing, column and row skip mode, and snapshot mode.

The sensor can be operated in its default mode or programmed by the user through a simple
two-wire serial interface for frame size, exposure, gain settings, and other parameters.

Table 3-3

contains the pin names and descriptions of the image sensor module.

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Содержание VEEK-MT-C5SOC

Страница 1: ...1 ...

Страница 2: ... VEEK USING VEEK USING VEEK MT MT MT MT C5SOC C5SOC C5SOC C5SOC 10 10 10 10 3 1 Using the Cyclone V SX SoC FPGA 10 3 2 Using the 7 LCD Capacitive Touch Screen 10 3 3 Using 5 megapixel Digital Image Sensor 12 3 4 Using the Digital Accelerometer 13 3 5 Using the Ambient Light Sensor 14 3 6 Using Terasic Multi touch IP 14 CHAPTER 4 CHAPTER 4 CHAPTER 4 CHAPTER 4 VEEK VEEK VEEK VEEK MT MT MT MT C5SOC D...

Страница 3: ...o best suit their specific application The VEEK MT C5SOC features the Altera Cyclone V SoC development board targeting the Altera Cyclone V SX SoC FPGA as well as a capacitive LCD multimedia color touch panel which natively supports multi touch gestures A 5 megapixel digital image sensor ambient light sensor and 3 axis accelerometer make up the rich feature set The all in one embedded solution off...

Страница 4: ...nfiguration Sources o Active Serial AS x1 or x4 configuration EPCQ256SI16N o MAX V CPLD 5M2210ZF256I5N in a 256 pin FBGA package as the System Controller o Flash fast passive parallel FPP configuration o MAX II CPLD EPM570GM100 as part of the embedded USB BlasterTM II for use with the Quartus II Programmer Memory Devices o One 1 024 Mbyte MB HPS DDR3 SDRAM with error correction code ECC support o ...

Страница 5: ...tton o One program configuration push button o Six general user push buttons o DIP switches o One MAX V CPLD System Controller control switch o One JTAG chain control DIP switch o One mode select DIP switch o One general user DIP switch On board Clocking Circuitry o Si570 Si571 and Si5338 programmable oscillators o 25 MHz 50 MHz 100 MHz 125 MHz 148 50 MHz and 156 25 MHz Oscillators o SMA input LVC...

Страница 6: ... 7 inch Diagonal Resolution 800 x3 RGB x 480 dot Dot pitch 0 1926 H x0 1790 V mm Active area 154 08 H x 85 92 V mm Module size 164 9 H x 100 0 V x 5 7 D mm Surface treatment Glare Color arrangement RGB stripe Interface Digital 5 Megapixel Digital Image Sensor Superior low light performance High frame rate Global reset release which starts the exposure of all rows simultaneously Bulb exposure mode ...

Страница 7: ...tage Power 3 3V I O 1 7V 3 1V D Di ig gi it ta al l A Ac cc ce el le er ro om me et te er r o Up to 13 bit resolution at 16g o SPI 3 and 4 wire digital interface o Flexible interrupts modes A Am mb bi ie en nt t L Li ig gh ht t S Se en ns so or r o Approximates human eye response o Precise luminance measurement under diverse lighting conditions o Programmable interrupt function with user defined u...

Страница 8: ...first one is to add the license file license_multi_touch dat to the licensed file listed in Quartus II as shown in Figure 1 2 Figure 1 2 License Setup The second way is to add license content to the existing license file The procedures are listed below Use Notepad or other text editing software to open the file license_multi_touch dat 1 The license contains the FEATURE lines required to license th...

Страница 9: ...7 1 1 3 3 G Ge et tt ti in ng g H He el lp p Here is the contact information should you encounter any problem Terasic Technologies Tel 886 3 575 0880 Email support terasic com ...

Страница 10: ... MT C5SOC including block diagram and components 2 2 1 1 L La ay yo ou ut t a an nd d C Co om mp po on ne en nt ts s The picture of the VEEK MT C5SOC is shown in Figure 2 1 and Figure 2 2 It depicts the layout of the board and indicates the locations of the connectors and key components Figure 2 1 VEEK MT C5SOC PCB and Component Diagram top view ...

Страница 11: ...C5SOC is a Cyclone V SoC development board and a Multi touch LCD Camera Card MTLC combination connected via the HSMC connector MTLC module is not only equipped with a 7 LCD screen it also equips a 5 Megapixel digital image sensor module G sensor and Light sensor All these sensors connect to the FPGA device via the HSMC connector so they can be controlled and directly used by the FPGA device Figure...

Страница 12: ...p pa ac ci it ti iv ve e T To ou uc ch h S Sc cr re ee en n The VEEK MT C5SOC features a 7 inch capacitive amorphous TFT LCD panel The LCD touch screen offers resolution of 800x480 to provide users the best display quality for developing applications The LCD panel supports 24 bit parallel RGB data interface The VEEK MT C5SOC is also equipped with a Touch controller which can read the coordinates o...

Страница 13: ...vfp 22 th Vertical Valid tvd 480 th DATA Setup time Tdsu 8 ns Hold time Tdsu 8 ns Table 3 2 Pin assignment of the LCD touch panel Signal Name FPGA Pin No Description I O Standard LCD_B0 C4 LCD blue data bus bit 0 2 5V LCD_B1 D5 LCD blue data bus bit 1 2 5V LCD_B2 A3 LCD blue data bus bit 2 2 5V LCD_B3 A4 LCD blue data bus bit 3 2 5V LCD_B4 E11 LCD blue data bus bit 4 2 5V LCD_B5 F11 LCD blue data ...

Страница 14: ...rol 2 5V LCD_UPDN B2 Up Down Display Control 2 5V LCD_VSD B11 Vertical sync input 2 5V TOUCH _I2C_SCL F14 touch I2C clock 2 5V TOUCH _I2C_SDA F15 touch I2C data 2 5V TOUCH _INT_n B12 touch interrupt 2 5V 3 3 3 3 U Us si in ng g 5 5 m me eg ga ap pi ix xe el l D Di ig gi it ta al l I Im ma ag ge e S Se en ns so or r The VEEK MT C5SOC is equipped with a 5 megapixel digital image sensor that provides...

Страница 15: ...AMERA_TRIGGER C5 Snapshot trigger 2 5V CAMERA_SDATA AG7 Serial data 2 5V CAMERA_XCLKIN AJ2 External input clock 2 5V 3 3 4 4 U Us si in ng g t th he e D Di ig gi it ta al l A Ac cc ce el le er ro om me et te er r The VEEK MT C5SOC is equipped with a digital accelerometer sensor module The ADXL345 is a small thin and ultralow power consumption 3 axis accelerometer with high resolution measurement D...

Страница 16: ...cal formula to approximate the human eye response For more detailed information of better using this chip please refer to its datasheet which is available on manufacturer s website or under the datasheet folder of the system CD Table 3 5 contains the pin names and descriptions of the ambient light sensor module Signal Name FPGA Pin No Description I O Standard LSENSOR_ADDR_SEL A6 Chip select 2 5V L...

Страница 17: ...uch has occurred and the relative X Y coordinates can be derived from oREG_X1 and oREG_Y1 Table 3 6 Interface Definitions of Terasic Multi touch IP Pin Name Direction Description iCLK Input Connect to 50MHz Clock iRSTN Input Connect to system reset signal iTRIG Input Connect to Interrupt Pin of Touch IC oREADY Output Rising Trigger when following six output data is valid oREG_X1 Output 10 bits X c...

Страница 18: ...lockwise 0x28 Rotate Anti clockwise 0x29 Click 0x20 Double Click 0x22 Two Point Gesture North 0x30 North East 0x32 East 0x34 South East 0x36 South 0x38 South West 0x3A West 0x3C North West 0x3E Click 0x40 Zoom In 0x48 Zoom Out 0x49 Note The Terasic IP Multi touch IP can also be found under the IP folder in the system CD as well as the IP folder in the reference designs ...

Страница 19: ... VEEK MT C5SOC system CD to your host computer 4 4 2 2 P Pa ai in nt te er r D De em mo on ns st tr ra at ti io on n This chapter shows how to control LCD and touch controller to establish a paint demo based on Qsys and Altera VIP Suite The demonstration shows how multi touch gestures and single touch coordinates operate Figure 4 1 shows the hardware system block diagram of this demonstration For ...

Страница 20: ...Batch File Folder Painter demo_batch The demo batch file includes the following files Batch File test bat test_bashrc FPGA Configure File Painter sof Nios II Program Painter elf Demonstration Setup Make sure Quartus II and Nios II are installed on your PC Power on the Cyclone V SoC development board Connect USB Blaster to the Cyclone V SoC development board and install USB Blaster driver if necess...

Страница 21: ...lette Canvas and Gesture Users can select pen color from the color palette and start painting in the Canvas area If gesture is detected the associated gesture symbol is shown in the gesture area To clear canvas content click the Clear button Figure 4 3 shows the photo when users paint in the canvas area Figure 4 4 shows the phone when counter clockwise rotation gesture is detected Figure 4 5 shows...

Страница 22: ...20 Figure 4 3 Single Touch Painting Figure 4 4 Counter clockwise Rotation Gesture ...

Страница 23: ...oard handles image processing part and converts the data to RGB format to display on the LCD module The I2C Sensor Configuration module is used to configure the CMOS sensor module Figure 4 6 shows the block diagram of the demonstration As soon as the configuration code is downloaded into the FPGA the I2C Sensor Configuration block will initial the CMOS sensor via I2C interface The CMOS sensor is c...

Страница 24: ...ach The writing clock is the same as CMOS sensor pix clock and the reading clock is provided by the LCD Controller which is 33MHz Finally the LCD controller fetches the RGB data from the buffer and displays it on the LCD panel continuously Because the resolution and timing of the LCD is compatible with WVGA 800 480 the LCD controller generates the same timing and the frame rate can achieve about 2...

Страница 25: ...the brightness of image will be increased as S5 is pressed longer If SW1 5 is set to On the brightness of image will be decreased as S5 is pressed shorter User can use SW1 8 to mirror image of the line However remember to press S6 after toggle SW1 8 Note execute the test bat under Camera demo_batch will automatically download the sof file Table 4 1 and Figure 4 7 summarizes the functional keys of ...

Страница 26: ...24 Figure 4 7 Block diagram of the digital camera design Figure 4 8 Screen shot of the VEEK MT C5SOC camera demonstration ...

Страница 27: ...I software we compute the change of angle in the x axis and y axis and show angle data in the LCD display The value of light sensor will change as the brightness changes around the light sensor Figure 4 9 shows the hardware system block diagram of this demonstration The system is clocked by an external 50MHz Oscillator Through the internal PLL module the generated 150MHz clock is used for Nios II ...

Страница 28: ...space G_sensor Software Note After the Nios II program is downloaded and executed successfully a prompt message will be displayed in nios2 terminal its ADXL345 s ID e5 Tilt the VEEK MT C5SOC to all directions and you will find that the angle of the g sensor and value of light sensor will change When turning the board from 80º to 10º and from 10º to 80 º in Y axis or from 10ºto 80º and from 80º to ...

Страница 29: ...27 Note Execute G_sensor demo_batch test bat to download sof and elf files ...

Страница 30: ...Appendix Appendix Appendix 5 5 1 1 R Re ev vi is si io on n H Hi is st to or ry y Version Change Log V1 0 Initial Version Preliminary 5 5 2 2 C Co op py yr ri ig gh ht t S St ta at te em me en nt t Copyright 2013 Terasic Technologies All rights reserved ...

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