DE10-Standard
LT24 Display
2
www.terasic.com
March 20, 2017
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Figure 2
shows the system block diagram of LT24-Display demonstration.
LT24_Display of RTL (Verilog) code on the demo project of "/ip/lt24_display" folder.
As shown Figure 2 , lt24_display the top module - lt24_display.v contains four block.
Pat_update.v is used with Touch (AD7843) connection, pat_update module will
receive the AD7843 in touch information (x, y coordinates), and then converted into
the corresponding action, this action triggers to the LCD display module generates
commands, and command again through cmd2lcd module to convert LCD panel
(ILI9341) can accept signals. The last timer module has only one function - to
produce a 33ms signal, which is used to make a long delay of the clock, such as LCD
during the initial stage will need ms dela.
Figure 2 System Block Diagram
