Telit Wireless Solutions WL865E4-P, Руководство пользователя, Страница: 36 / 56

WL865E4-P Module Hardware User Guide
1VV0301580 Rev. 4 Page 36 of 56 2019-08-08
The Bypass capacitors must be placed close to the Telit modem’s power input pads or at
least on the same path. In case of switching power supply another Bypass low ESR
capacitor must be placed close to the inductor output to reduce the ripple.
Some protection diode must be placed close to the input connector where the power source
is drained.
It is not advisable to route analog or digital audio lines, memory address and data bus, fast
digital signals, clocks, quartz, serial and long signal tracks on an outer layer. It’ll be better
to bury it on an inner layer with a ground plane under and above it to shield the signal from
RF and crosstalk, see figure below.
Figure 3: Example of buried lines
6.7.2. RF PCB Guidelines
The WL865E4-P module provides a 50
Ω antenna pad, which has to be routed to the
antenna connector (or the integrated antenna) by means of a transmission line.
Keep as close ad possible to 50
Ω impedance in the RF track including the RF Pad. It is
important to make RF trace equal or wider than the Pad width to avoid step impedance.
The line should be as short as possible, and keep a constant cross section, avoiding stubs,
sharp bends and meanders. Eliminate the right angle on your antenna waveguide design.
It shall be isolated from any other noise source: in particular, trace shall not be crossed by
other lines in adjacent layers. Instead, a continuous ground plane is recommended under
the antenna trace, and a ground via curtain should connect it to the coplanar ground planes.
The size depends by the stackup and by t
he structure that you’re going to realize.
As an example of a possible implementation, the details of the antenna trace on the WL865
interface board are described in this section.
A Grounded Coplanar Waveguide (G-CPW) line has been chosen, since this kind of
transmission line ensures good impedance control and can be implemented in an outer
PCB layer as needed in this case. A SMA female connector has been used to feed the line.
The interface board is realized on a FR4, 4-layers PCB. Substrate material is characterized
by relative permittivity εr = 4.6 ± 0.4 @ 1 GHz, TanD= 0.019 ÷ 0.026 @ 1 GHz.