Telit Wireless Solutions NE310L2, Руководство по конструкции аппаратуры

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NE310L2 Hardware Design Guide
1VV0301711 Rev. 2 Page 32 of 64 2021-06-22
Note: According to V.24, some signal names are referred to the
application side, therefore on the NE310L2 side these signal are in
the opposite direction:
TXD on the application side will be connected to the receive line (here
named C103/TXD0)
RXD on the application side will be connected to the transmit line
(here named C104/RXD0)
For a reduced implementation, only the TXD, RXD lines can be
connected, the other lines can be left open provided that a software
flow control is implemented.
In order to avoid a back powering it is recommended to avoid having
any HIGH logic level signal applied to the digital pins of the NE310L2
when the module is powered off or during an ON/OFF transition
(RESET included).
5.7.2.2. Asynchronous Serial Port (USIF1)
The serial port 1 on the NE310L2 is a +1.8V UART with 5 RS232 signals. It differs from the
PC-RS232 in the signal polarity (RS232 is reversed) and levels.
Warning: C104/RXD1 cannot have any PU or HIGH state during
BOOTING UP phase.
The following table lists the available signals:
RS232 Pin Signal Pad Name Usage
2 C104/RXD1 AA11 Transmit line
Output transmit line of NE310L2
UART
3 C103/TXD1 Y12 Receive line
Input receive of the
NE310L2 UART
Pull-up default during ON state
5 GND
A3, A7, A9, A13, A17, B4,
B6, B10, B12, B14, B16,
C19, D18, F8, F12, F18,
G19, H6, H14, J19, K18,
M18, N19, P6, P14, T8,
T12, U1, V2, W19, Y2, Y4
Ground Ground