ME910G1 Hardware Design Guide
1VV0301593 Rev.12
Page 45 of 93
2021-09-24
Not Subject to NDA
The USB_DPLUS and USB_DMINUS signals have a clock rate of 480 MHz, so the signal
traces should be carefully routed. Trace lengths, number of vias and capacitive loading
should be minimized. The characteristic impedance value should be as close as possible
to 90 Ohms differential.
ESD protection can be added to USB D+/D- lines in case of external connector for cable
connection. Proper components for USB 2.0 must be used.
SPI
The ME910G1 Module is provided by a standard 3-wire master SPI int chip select
control.
The following table lists the available signals:
PAD
Signal
I/O
Function
Type
NOTE
D15
SPI_MOSI
O
SPI MOSI
CMOS 1.8V
Shared with
TX_AUX
E15
SPI_MISO
I
SPI MISO
CMOS 1.8V
Shared with
RX_AUX
F15
SPI_CLK
O
SPI Clock
CMOS 1.8V
H14
SPI_CS
O
SPI Chip Select
CMOS 1.8V
Table 21: Available Signals
Note: Due to the shared functions, SPI port and TX_AUX/RX_AUX port
cannot be used simultanously.
Refer to ME910G1 series AT command reference guide for port
configuration.
SPI Connections
Figure 13: SPI Connections
SPI_CS
SPI_MISO
SPI_MOSI
SPI_CLK
E15
D15
F15
ME910G1
Application
Processor
H14
SPI_CS
Содержание ME910G1
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