GE865 Hardware User Guide
1vv0300799 Rev.9 – 27-07-2009
Reproduction forbidden without Telit Communications S.p.A. written authorization - All Rights Reserved
page 46 of 70
10.1.2 Output Lines
WARNING.
When in
Single Ended
configuration, the unused output line must be left
open: if this constraint is not respected, the output stage will be damaged.
“EAR_MT” Output Lines
line coupling single-ended
differential
AC
DC
output load resistance
≥
14
Ω
internal output resistance
4
Ω
(
typical
)
signal bandwidth
150 ÷4000 Hz
@
-3dB
max. differential output voltage 1.31 V
rms
(
typical, open circuit
)
differential output voltage 328mV
rms
/16
Ω
@ -12dBFS
(*)
volume increment
2 dB per step
volume steps
10
(*)
0dBFS
is the
normalized
overall Analog Gain equal to
3,7V
pp
differential
TIP
: We suggest driving the load differentially , thus the output swing will double and
the need for the big output coupling capacitor avoided. However if particular OEM
application needs, also a Single Ended
(S.E)
circuitry can be implemented but the
output power will be reduced four times.
The OEM circuitry shall be designed to reduce the common mode noise typically
generated on the ground plane,getting the maximum power output from the device
(low resistance tracks).