Teletype 43K001/AAA, Руководство по ремонту

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the printer logic via the send data output pin 6 .
The character information is mark-space data
encoded in ASCII* or extended ASCII conforming
to the following sequence of characters: LOCAL,
CARRIAGE RETURN (CR), LINE FEED (LF)
and AUTO ANSWER .
Each transmitted character consists of a start
bit followed by nine bits of information
defined as bits "0" through "8" and ending
with a stop bit. The keyboard inserts three
additional stop time intervals between each
transmitted character. The data is transmitted
at a 7 kilobits per second rate at TTL signal
levels whereby a high is defined as a mark and
a low is a space.
The four-character mark-space sequence is stored
in the keyboard ROM whereby the total number
of bits serially transmitted is 53 over a time
interval
of approximately 7.6 milliseconds.
Internal keyboard control signals are also stored
in the ROM.
2. START CONTROL
The RESET keyswitch when depressed, initiates
the start sequence. Its signal is gated with the on­
shot, MLAl-7 (F4) to eliminate noise spikes due
to contact bounce, thus providing a clean signal
to set the start latch to the "1" state.
The PRINTER TEST keyswitch, when depressed,
applies a ground signal to the printer logic causing
the printer to print out a test message. Upon the
release of the PRINTER TEST keyswitch, the
one-shot MLAl-9 (D3) is triggered presenting
a low signal for approximately 12 milliseconds to
gate input MLA2-12. This signal is used to set the
start latch to the "1" state.
3. START LATCH
The start latch (E7), when in the set "1" state,
removes the "MR" signal from the address
counters MLB2 and MLB3 (F9) and the divide
by 8 frequency counter. At this time, the output
of the latch MLA3-6 goes high, the gate MLA3-11
is enabled, and its output goes low removing the
reset (RO and R9) on the decade counter, MLA4.
4. CLOCK DIVIDER
The input to the decade counter is a 560 KHz
square wave free running clock signal from the
printer logic card. With the decade counter
MANUAL 525, 4-3
enabled, the input clock is divided by 10 and its
output drives the second counter stage which is
enabled by a low on the master reset (MR)
input. The output of the second stage is a 7 KHz
square wave signal that drives an address
counter.
5. ADDRESS COUNTER
The address counter consists of two four-bit
counters, MLB2 and MLB3. The address counter
in turn drives the ROM address inputs. In the
reset or idle state, the address counter is at count
0, all outputs low (0 V). With the clock logic
enabled, the address counter is advanced at a
7 KHz rate and proceeds to count up until a
count of 54 is reached.
6.
ROM-STORED DATA
As the address counter is advanced, bit information
that is stored in level 2 of the ROM (FlO) is
serially shifted out via pin 11 at a 7 KHz rate
to the printer logic.
When address count 54 is reached, the level 1
output of the ROM goes to 0 V causing gate
MLA3-11 to go high. The high signal from gate
MLA3-11 resets the decode counter via pins 2
and 6 thereby inhibiting its output, stopping
the address counter at count 54. The address
counter remains at count 54 until the RESET
key is released at which time the start latch is
reset to the 0 state. This causes MLA3-8 to go
high resetting the address counter to count 0.
The send data lead is always marking during
the idle state and after the four-character sequence
has been transmitted.
ROM level 3, pin 10, is connected
to
MLA2,
pin 10. This control input prevents premature
resetting of the start latch once the four-char­
acter sequence has been started. When the address
counter steps from count 0 to 1, the ROM level
3 output goes from a high to a low keeping a
high on gate output MLA2-8. When count 54 is
reached, level
·
3 output goes high and if the
gate input MLA2-9 is high at this time, the
start latch will be reset. If the gate input is low,
start latch will not be reset until the RESET
keyswitch is released or the one-shot MLAl-9
times out. It takes approximately 7.6 milliseconds
to send the four-character sequence.
*American National Standard Code for Information Interchange.