Tektronix TMSMPH4 mPGA479, Инструкция по эксплуатации

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TMSSY2 mPGA479 Socket Hardware Support
17
Specifications
Circuit Description
The probe adapter hardware uses a custom ASIC to preprocess the 4x (Quad
Pumped) Signals before the signals are captured by the logic analyzer. The
custom ASIC performs the following functions:
H
Latches signals within a narrow valid window
H
Demultiplexes double-pumped, source-synchronous signals
H
Deterministically synchronizes source-synchronous signals to BCLK
All other signals are buffered and amplified in the probe adapter hardware before
being captured by the logic analyzer.
The microprocessor signals are processed in the probe adapter according to their
type. Following is a description of each type:
4x Quad-Pumped Signals.
These signals include D[63:00]# and DBI[3:0]#. The
ASIC latches these signals using their dedicated strobes, STBP[3:0] and
STBN[3:0], and then performs four-way demultiplexing on these signals. The
ASIC also inverts the appropriate signals when the DBI[3:0] signals are active.
2x Double-Pumped Signals.
These signals include A[39:03]# and REQ[4:0]#. The
logic analyzer latches these signals using their dedicated strobes, ASTB[1:0],
and then performs two-way demultiplexing on these signals.
1x Common-Clock Signals. These signals include all of the remaining front-side bus
signals. The logic analyzer latches these signals using the rising edge of BCLK.
The probe adapters use passive series isolation to acquire data.
The probe adapter uses a bus tracking PAL to aid the disassembly software in
linking various bus phases.
Latched Operation
Signal Probing
Bus Tracking Logic