Tektronix 80A07, Руководство пользователя

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Getting Started
8
80A07 Clock Recovery User Manual
H
Edge Density Mode Sets bandwidth. Calculations are based on the
Expected Edge Density (user entered) or edge
density measured during lock.
H
Clock Amplitude Output amplitude of the full-rate clock.
H
Sub-rate Amplitude Output amplitude of the sub-rate clock.
H
Sub-rate Division Division ratio of the sub-rate clock.
All settings are saved automatically at power off and restored at power on. You
can also save current settings to one of four Setups that can be recalled later.
The left side of the display provides several continuously updated measurements:
H
Frequency The measured frequency of the recovered clock.
H
Phase Error The peak-to-peak phase error between the
incoming data and the recovered clock. This
measured value increases if jitter is present on the
input data that is not being tracked by the
recovered clock.
H
Phase Error RMS The RMS phase error between the incoming data
and the recovered clock.
H
Lock State Reports whether the CR is locked, unlocked, or in
the process of locking.
By default, the 80A07 is configured in Auto Lock Mode, where it automatically
attempts to acquire lock if the detected Phase Error exceeds the Phase Error
Limit setting or if the recovered clock is unstable. The user may force a relock at
any time by pressing the Lock button.
You can utilize the 80A07 with a Tektronix sampling oscilloscope such as the
DSA8200 Digital Serial Analyzer, to display the data input. Use the clock output
to trigger the oscilloscope. Figure 5 shows a typical setup configuration.
Figure 5: Typical setup configuration