MAINBOARD BIOS SETUP
MAINBOARD BIOS SETUP
P6B40D-A5 User’s Manual
P6B40D-A5 User’s Manual
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DRAM Data Integrity Mode
- When set at
Non-ECC
(default), there will be no memory
errors shown on the monitor for
Memory parity SERR# (NMI)
. When parity DRAM
modules are used, select
ECC
(Error Checking and Correcting) to correct 1-bit memory
errors in the memory.
System BIOS Cacheable
- When
Enabled
, the contents of the F0000h system memory
segment can be cached to the Level-2 cache memory. The contents of the F0000h memory
segment are always copied from the BIOS ROM to system RAM for faster execution and
PCI compliance.
Video RAM Cacheable
-
Enabled
will cause access to the video RAM addressed at
B0000H to BFFFH to be cacheable and also let the A0000H to AFFFFH to be a UC memory
type.
8 Bit I/O Recovery Time
- The recovery time is the length of time, measured in ISA BUS
clocks, that the system will delay after the completion of an input/output request. This delay
takes place because the CPU is operating faster than the input/output bus. Therefore the
CPU must be delayed to allow for the completion of I/O transfers. This item allows you to
determine the recovery time allowed for 8 bit I/O. Choices are from NA, 1 to 8 ISA BUS
clocks. *
1
is the default.
16 Bit I/O Recovery Time
- This item allows you to determine the recovery time allowed
for 16 bit I/O. Choices are from NA, 1 to 4 ISA BUS clocks. *
1
is the default.
Memory Hole At 15M-16M
- In order to improve compatibility, certain space in memory
can be reserved for old style ISA cards that map memory between 15M-16M. Do not enable
this feature unless you use the old style ISA card, otherwise the memory size may be
reduced to 15 MB for some O.S. *
Disabled
is the default.
Passive Release
- The PIIX4 provides a programmable Passive Release mechanism to meet
the required master latencies. When
enabled
(default), ISA masters may see long delays in
access to any PCI memory, including the main DRAM array.
Delayed Transaction
- When enabled, the delay transaction mechanism will be in effect
when PIIX4 is the target of a PCI transaction.
AGP Aperture Size (MB) -
Select the size of the Accelerated Graphics Port (AGP)
aperture. The aperture is a portion of the PCI memory address range dedicated for graphics
memory address space. Host cycles that hit the aperture range are forwarded to the AGP
without any translation. See www.agpforum.org for AGP information.
Options are 4, 8, 16,
32, 64 (default), 128 and 256 MB.
System Hardware Monitor -
The onboard hardware monitor allows you to observe the
current temperatures of the CPU(s) and system, current speeds (in RPM, rotation per
minute) of the CPU fan(s) and chassis fan, as well as the various operating voltages. (If the
fan is not installed, 0 RPM will be shown.)
