Teac CR-L600, Руководство по обслуживанию

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TC2000 Audio Signal Processor Pin Descriptions
Pin Function Description
1 BIASCAP Bandgap reference times two (typically 2.5VDC). Used to set the common mode
voltage for the input op amps. This pin is not capable of driving external circuitry.
2, 6 FDBKP2, FDBKP1 Positive switching feedback.
3 DCMP Internal mode selection. This pin must be grounded for proper device
operation.
4, 7 FDBKN2, FDBKN1 Negative switching feedback.
5 VPWR Test pin. Must be left floating.
8 HMUTE Logic output. A logic high indicates both amplifiers are muted, due to the mute pin
state, or a ìfaultî.
9, 12 Y1, Y2 Non-inverted switching modulator outputs.
10, 11 Y1B, Y2B Inverted switching modulator outputs.
13 NC No connect
14 OCD2 Over Current Detect.
15 REF Internal reference voltage; approximately 1.2 VDC.
16 OCD1 Over Current Detect. This pin must be grounded for proper device
operation.
17 VLO Negative power stage over/under supply voltage sense resistor tie point.
18 OVRLDB A logic low output indicates the input signal has overloaded the amplifier.
19 VHI Positive power stage over/under supply voltage sense resistor tie point.
20 GND Ground.
21 V5 5 Volt power supply input.
22, 27 VP1, VP2 Input stage output pins.
23, 28 IN1, IN2 Single-ended inputs. Inputs are a ìvirtualî ground of an inverting opamp with
approximately 2.4VDC bias.
24 MUTE When set to logic high, both amplifiers are muted and in idle mode. When low
(grounded), both amplifiers are fully operational. If left floating, the device stays in
the mute mode. Ground if not used.
25, 26 BBM1, BBM0 Break-before-make timing control to prevent shoot-through in the output FETs.
TC2000 Audio Signal Processor Pinout
1
2
3
4
5
6
7
8
9
10
11
12
13
14 15
16
17
18
19
20
21
22
23
24
25
26
27
28
BIASCAP
FDBKP2
DCMP
FDBKN2
VPWR
FDBKP1
FDBKN1
HMUTE
Y1
Y1B
Y2B
Y2
NC
OCD2 REF
OCD1
VLO
OVRLDB
VHI
GND
V5
VP1
IN1
MUTE
BBM1
BBM0
VP2
IN2