INSTRUCTION MANUAL
-
MODEL
DLR
400-5-7
50A
19
The
DC
load
current
is
provided
by
four
groups
of
five
power
transistors
—
typically Q103
through Q107
.
Due
to
the
high
input
voltage
requirements,
these groups
are
connected
in
series.
A
voltage
divider
taken from
bias
supply developed
by
components
on
PCB
board
A2
is
fed
through
a
divider consisting
of
R4-R11-R12-R13
to
ground.
Each
group
of
load
transistors is
driven
by a
driver
transistor,
typically
Q3-Q4-Q5.
The
bases
of
these
driver
transistors
are
connected
to
the
junctions of
the
resistors
taken
from
the
bias
supply.
This
assures that each
bank
of
pass
transistors
shares
the input
voltage
equally.
Three
of
the banks
consisting
of
Q103 through Q107,
Q108
through
Q112,
Q113
through
Q117
are
slave
banks
to the
actual
regulating
bank consisting
of
Q118
through
Q122,
where
the
actual
load current
regulation
is
controlled.
5.2
0-.01A/V
MODE
The
+16VDC
input
is
divided
by
a
divider
consisting
of
R24,
R54,
and the
DC
load
adjust
controls R125A
and
R125B.
A
portion
of
the
input
voltage
is
fed
through
R49
to
the
non-inverting
input of
U1
(Pin
5).
The inverting
input
of
U1 (Pin
4) is
connected
through
R27
to
the
top
of
SH101
(+).
As
R125
is
turned
clockwise, the non-inverting
input
(Pin
5)
becomes
more
positive
than
inverting input
(Pin
4),
causing
U1
to
turn
on,
allowing
current
to
flow
from
V
c
(Pin
11)
to
V
qut
(Pin
10)»
which
in
turn drives Q118
and
consequently,
the
pass transistor
structure.
[DUM00-5-75QA]
