DD-MM-YY
......
DRAWN
CHECKED
ON:
BY:
BY:
ON:
PAGE:
OF :
1
2
3
4
5
6
7
8
9
10
11
12
H
G
F
E
D
C
B
A
12
11
10
9
8
7
6
5
4
3
2
1
THIS DRAWING CANNOT BE COMMUNICATED TO UNAUTHORIZED PERSONS COPIED UNLES S PERMITTED IN WRITING
FORMAT DIN A1
H
G
F
E
D
C
A
RB0N
RB0P
RB1N
RB1P
RB2N
RB2P
RBCKN
RBCKP
RB3N
RB3P
RB4N
RB4P
RC0N
RC0P
RC1N
RC1P
RC2N
RC2P
RCCKN
RCCKP
RC3N
RC3P
RC4N
RC4P
RD0N
RD0P
RD1N
RD1P
RD2N
RD2P
RDCKN
RDCKP
RD3N
RD3P
RD4N
RD4P
RE0N
RE0P
RE1N
RE1P
RE2N
RE2P
RECKN
RECKP
RE3N
RE3P
RE4N
RE4P
RXM[4]
RXP[4]
RXM[5]
RXP[5]
RXM[6]
RXP[6]
RXM[7]
RXP[7]
RXM[8]
RXP[8]
RXM[9]
RXP[9]
RXM[10]
RXP[10]
RXM[11]
RXP[11]
VX1R_LOCK_O_/_GPIO[15]
VX1R_LOCK_V_/_GPIO[16]
VX1R_LOCK_V2_/_GPIO[17]
VX1R_HTPD_O_/_GPIO[12]
VX1R_HTPD_V_/_GPIO[13]
VX1R_HTPD_V2_/_GPIO[14]
VDDC_1V
VDDC_1V1
VDDC_1V2
VDDC_1V3
VDDC_1V4
AVDD_DDR0_D
AVDD_DDR0_D1
AVDD_DDR0_D2
AVDD_DDR0_D3
AVDDL_HDMITX_1V
AVDDL_LVDSRX__1V
AVDDL_LVDSRX_1V
AVDDL_VB1RX_1V
AVDDL_VB1RX_1V1
AVDD_MOD_2.5
AVDD_MOD_2.5_1
AVDD_MOD_2.5_2
AVDD_MOD_2.5_3
AVDD_LVDSRX_3.3
AVDD_LVDSRX_3.3_1
AVDD_LVDSRX_3.3_2
AVDD_DDR1_D
AVDD_DDR1_D1
AVDD_DDR1_D2
AVDD_DDR1_D3
AVDD_DDR1_C
AVDD_DDR1_C1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
I2CM_SDA
I2CM_SCL_/_VSYNC_LIKE1
TCON8_/_VX1T_HTPDN
TCON9_/_VX1T_LOCKN
INT_R21_/_GPIO[41]
INT_R20_/_GPIO[42]
GPIO[10]_/_PWM_DIM_IN[0]
GPIO[11]_/_PWM_DIM_IN[1]
GPIO[8]_/_HDMIRX_CEC
GPIO[9]_/_HDMIRX_HPD
GPIO[6]_/_DDCDA_CK
GPIO[7]_/_DDCDA_DA
(5)
(5)
(5)
(5)
(5)
(5)
(5)
Need use 4MB
Bead
Debug/ISP ADDR
Slave (Debug Port:0xB4, ISP:0x98)
CHIP_CONF= 3'd7: 111 : boot from SPI Flash
Reset
[SPI Flash]
CHIP_CONF: {DIM2, DIM1, DIM0}
I2C_S Port
GPIO & Debug
(10)
Debug Port
(14)
(1)
(5)
(14)
Debug Display
USE 13-KLN121-06X wise20130307
USE 13-KLN121-06X wise20130307
USE 13-KLN121-06X wise20130307
Add the "6M40_RST" controlling port by Frank/20130528
Debug Display
Heat-sink 2013.09.02
R1214
120R/BEAD
X24M1
R1204
AH28
AH29
AJ27
AJ28
AH32
AH31
AG32
AG30
AF30
AG31
AE30
AF31
U1202
R1213
120R/BEAD
R1281
120R/BEAD
1K
NC/
R1215
0R
R1216
0R
AH20
AG20
AJ21
AH21
AG21
AG22
AH22
AG23
MST6M40
AF23
A24
F24
G24
H24
J24
K24
L24
M24
N24
P24
R24
T24
U24
V24
W24
Y24
AA24
AB24
AC24
AD24
AE24
AF24
B25
F25
G25
H25
J25
K25
L25
M25
N25
P25
R25
T25
U25
V25
W25
Y25
AA25
K26
L26
M26
N26
P26
R26
T26
U26
V26
W26
Y26
AB26
AC26
AD26
AE26
AF26
B27
E27
F27
G27
H27
J27
K27
L27
M27
N27
P27
R27
T27
U27
Y30
AA30
AB30
A31
F31
H31
K31
R31
U31
W31
AD16
AE16
AF16
AG16
AH16
AJ16
A17
F17
G17
H17
J17
K17
MST6M40
G7
H7
J7
K7
L7
M7
N7
P7
R7
T7
U7
V7
W7
Y7
AA7
AB7
AF7
AG7
AL2
AL1
AK3
AK1
AJ3
AJ2
AH3
AH2
AG3
AG1
AG2
AF3
AE3
AE2
AE1
AD3
AD2
AC3
AA5
Y4
AC2
AB3
Y5
Y6
AB2
AB1
W6
V6
AA3
AA1
W5
W4
AA2
Y3
V5
U4
Y2
W3
U5
U6
W2
W1
T6
R6
V3
V1
T5
T4
V2
U3
R5
P4
T1
R3
R1
R2
P2
N3
N2
N1
M1
M2
L3
L2
K2
K1
J3
J1
H3
H2
G3
G2
G1
F3
F1
F2
E3
E2
D3
D2
G4
G5
H5
H6
G6
F4
D1
D4
C1
C2
B1
B2
A2
C3
A3
B3
C4
B4
C5
B5
A5
C6
A6
B6
C7
B7
C8
B8
U1202
R1226
33R
33R
33R
R1223
4K7
NC/
10K
R1209
1M
47K
R1203
47K
0R
R1229
R1205
R1231
2U2
0BAV99
2U2
Содержание L49E7800UDS
Страница 3: ...ALIGNMENT ELECTRICAL TEST PROCEDURE MS1369K LA L55E6700UDS L55E5700UDS V1 0...
Страница 15: ...Chassis Block Diagram MS1369K LA Chassis Block Diagram...
Страница 16: ...Chassis Block Diagram Chassis Block Diagram 6M40...
Страница 17: ...Power Supply Block Diagram...
Страница 18: ...Power Supply Block Diagram...