15-Dec.2017 Ver.1.4
TAIYO YUDEN CO., LTD.
TAIYO YUDEN CO., LTD.
3/9
EBSGJN, EKSGJN
EBAGJN, EKAGJN
Evaluation board circuit schematic
Evaluation board layout
1)
All pin headers are 2.54mm pitch. And distance between
CN3
and
CN4
is
15.24mm
.
2) CN3-CN6, C1-C2, C4, C6, C9, L1-L3, JP1-JP4, SB1-5, R5
are not mounted (N.M.).
3) D1 (LED):
USB VBUS 5V LED Indicator
4) D2 (LED):
UART TX Indicator
5) D3 (LED):
UART RX Indicator
6) SW1 (Push button):
Module Reset (active low)
U2: BLE Module
EYSGJN Series or
EYAGJN Series
CN6: Power consumption
monitor
Default: Short
CN5: Jumper of internal 3V3
Default: Short
CN2: miniUSB - UART
+5V DC power supply
CN1: SWD (for J-link
lite)
SW1: Reset button
CN3: GPIOs and external DC power
supply
CN4: GPIOs, SWD and DC power
supply
JP3: Antenna selector
Default: Internal
Antenna
CN7: RF Connector
U.FL-R-SMT (HIROSE)
JP1,2: 32.768KHz source
select JPW
Default: External X'tal
EYSGJN
U2
X1
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