41CL Calculator Manual
© 2019 Systemyde International Corporation
64
Bit 15 is the Enable (EN) bit. If this bit is zero, the MMU entry is ignored and the corre-
sponding page and bank will be fetched from a Port.
Bit 14 is the Lock (LCK) bit, used only with the
41CL Extreme Functions
. If this bit is set
to one the entry cannot be changed, except with either the
UNLOCK
function or the
MMUCLR
function.
Bits 13 and 12 are the Multi-page Image (MULTI) bits, used only with the
41CL Extreme
Functions
. These bits are managed automatically by the
PLUG
and
PPLUG
functions,
with the following meanings:
13
12
MULTI
0
0
Not part of a multi-page image
0
1
First page of a multi-page image
1
1
Middle page of a multi-page image
1
0
Last page of a multi-page image
Bits 11-0 hold the twelve address bits to be substituted for the Page address (bits 15-12)
portion of the logical address, to create the physical address.
The MMU and data addresses
Da
t
a
a
ddr
e
s
s
e
s
(
“
r
e
gi
s
t
e
r
s
”
i
n
41C
parlance) are also translated by the MMU, but this
translation is not programmable. Instead, registers are mapped to specific locations in the
RAM on the 41CL board. This dedicated mapping is shown in the table below. Note that
the 41C OS is not capable of addressing registers above 0x3FF, but space is reserved in
the 41CL memory for register addresses up to 0xFFF in case there are future enhance-
ments to the OS code.
In the 41C system only the lower four bits of the register address can be specified by an
instruction, and all of the upper register address bits are held in a dedicated register called
(
not
s
ur
pr
i
s
i
ngl
y)
t
he
“
r
e
gi
s
t
e
r
a
ddr
e
s
s
”
.
I
n
t
he
41CL
t
hi
s
r
e
gi
s
t
e
r
a
ddr
e
s
s
i
s
s
t
or
e
d
i
n
t
he
RAM in a special location, at address 0x804000.
Like the original 41C, the 41CL preserves the data in RAM as long as power is applied.
Unlike the original 41C, the 41CL allows RAM to be used to hold program data. All that
is required for this type of operation is that the MMU point to a 4K block of RAM rather
than a 4K block in the Flash portion of the address space. In the 41CL bit 23 of the physi-
cal memory address determines whether the address is in Flash (bit 23 is zero) or in RAM
(bit 23 is one).
