Supersonic Franky, Инструкция по эксплуатации

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Frame interrupts
Depending on the height of the display, the VDP will attempt to generate a frame
interrupt on the following lines:
Height Line
192 $C1
224 $E1
240 $F1
On the line in question, the VDP will set bit 7 of the status flags. This bit will remain set
until the control port is read.
Bit 5 of register $01 acts like a on/off switch for the VDP's IRQ line. As long as bit 7 of
the status flags is set, the VDP will assert the IRQ line if bit 5 of register $01 is set, and it
will de-assert the IRQ line if the same bit is cleared.
Line interrupts
The VDP has a counter that is loaded with the contents of register $0A on every line
outside of the active display period excluding the line after the last line of the active
display period. It is decremented on every line within the active display period including
the line after the last line of the active display period.
To help you understand how this works, here is an example for a 192-line display on an
NTSC machine that has 262 scanlines per frame:
Out of lines 0-261:
 The counter is decremented on lines 0-191 and 192
 The counter is reloaded on lines 193-261
When the counter underflows from $00 to $FF, it is reloaded with the last value written
to register $0A. Writing to register $0A will not immediately change the contents of the
counter, this only occurs when the counter is reloaded (meaning outside of the active
display period as described above, or when the counter has underflows).
When the counter underflows, the VDP sets an internal flag which I will call the line
interrupt pending flag. This flag remains set until the control port is read.
Bit 4 of register $00 acts like a on/off switch for the VDP's IRQ line. As long as the line
interrupt pending flag is set, the VDP will assert the IRQ line if bit 4 of register $00 is set,
and it will de-assert the IRQ line if the same bit is cleared.