22
Register $02
Name Table Base Address
D7
No effect
D6
No effect
D5
No effect
D4
No effect
D3
Bit 13 of the table address
D2
Bit 12 of the table address
D1
Bit 11 of the table address
D0
No effect
If the 224 or 240-line displays are being used, only bits 3 and 2 select the table address
like so:
The contents of this register are handled differently. In order to explain, here is a layout
of the VRAM address bus when the VDP fetches name table data
:
b = Bits 3-1 of register #2
r = Name table row
c = Name table column
w = Low or high byte of name table word
x = Bits 3-0 of register #2
In all other versions of the VDP, bit 0 of register #2 is ignored. However, the SMS VDP
will logically AND bit 0 with the VDP address, meaning if bit 0 is cleared, bit 4 of the
name table row is forced to zero.
When the screen is displayed, this causes the lower 8 rows to mirror the top 16 rows.
The only game that utilizes this feature is the Japanese version of Y's.
The original TMS9918 has a similar problem with other table registers, however this is
not apparent in the TMS9918 modes of the 315-5246.
MSB LSB
--bbbrrrrrcccccw Address bus
--xxxx---------- Contents of register #2 shifted to the left
D3 D2 Address
-- -- -------
0 0 $0700
0 1 $1700
1 0 $2700
1 1 $3700
Содержание Franky
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