Chapter 2: Installation
2-31
Speaker Header
The speaker header (JSPK1) for an
onboard buzzer can be used to pro-
vide audible indications for various
beep codes. See the table on the
right for pin definitions. Refer to the
layout below for the locations of the
Internal Buzzer.
Speaker Header
Pin Definition
Pin# Definitions
Pin 1
Pos. (+)
5V
Pin 2
Neg. (-)
Alarm
Speaker
T-SGPIO1
T-SGPIO2
I-SAT
A0
COM1
JSD1
LE4
SW1
JPW10
LAN2 LAN1
JL1
JOH1
JSPK1
JPLD1 JI2C2
JI2C1
JPW7
JPW4
JPW3
JVGA1
JPW9
JPW1
Battery
LE1
DM1
JWD1
J30
JPB1
J29
JPL1
JPG1
FAND FANC
FANB FANA FAN4 FAN3
FAN2 FAN1
FANH
FANG
FANF
FANE
JF1
JPW2
JTPM1
JITP0
SXB1B PCI-E 3.0 X16
SXB4 PCI-E 3.0 X16
CPU2
SXB3 PCI-E 3.0 X16
SXB2 PCI-E 3.0 X16
SXB1C
P1-DIMMA1
P1-DIMMA2 P1-DIMMB1 P1-DIMMB2
P2-DIMMG1 P2-DIMMG2 P2-DIMMH1 P2-DIMMH2
P1-DIMMD2
P1-DIMMD1 P1-DIMMC2 P1-DIMMC1
P2-DIMMF2 P2-DIMMF1 P2-DIMME2
P2-DIMME1
CPU1
IPMI LAN
SXB5 PCI-E 3.0 x8 in x16
SXB1A
JPW
6
JPW5
I-SAT
A1
I-SAT
A2
I-SAT
A3
I-SAT
A4
I-SAT
A5
JBT1
BIOS
PCH
C602J
LAN
CTRL
BMC
X9DRG-HF+
Rev. 1.01
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
USB0/1
JPME2
JPME1
A
B
DOM Power Connector
A power connector for SATA DOM
(Disk_On_Module) devices is located
at JSD1. Connect an appropriate
cable here to provide backup power
support for your SATA DOM devices
to retain cache data during power
outage. See the table on the right for
pin definitions..
DOM PWR
Pin Definitions
Pin# Definition
1
+5V
2
Ground
3
Ground
A. Onboard Speaker Header
B. SATA DOM PWR
Содержание X9DRG-HF+
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