Chapter 2: Installation
2-19
Ethernet Ports
Two Ethernet ports (LAN1/LAN2) are
located next to the VGA port on the I/O
Backpanel. In addition, an IPMI Dedi-
cated LAN is also located above USB
0/1 ports on the X8SIL-F to provide a
dedicated network connection for IPMI
2.0 support. These ports accept RJ45
type cables.
Note
s:
1. The IPMI Dedicated LAN
is for the X8SIL-F only.
2. Please refer to the LED
Indicator Section for LAN
LED information.
LAN Ports
Pin Definition
Pin# Definition
1
P2V5SB
10
SGND
2
TD0+
11
Act LED
3
TD0-
12
P3V3SB
4
TD1+
13
Link 100 LED
(Yellow, +3V3SB)
5
TD1-
14
Link 1000 LED
(Yellow, +3V3SB)
6
TD2+
15
Ground
7
TD2-
16
Ground
8
TD3+
17
Ground
9
TD3-
88
Ground
(NC: No Connection)
1. LAN1
2. LAN2
3.IPMI Dedicated LAN (X8SIL-
F only)
3
1
2
MAC CODE
JPI2
C
JF1
JPW1
U2
6
J8
J6
J5
J1
4
1
J1
3
U6
1
T-SGPIO1
T-SGPIO2
J24
JLAN2
JLAN1
SPKR
1
JBT1
JI2C1
1
JI2C2
1
LE4
LE2
LE3
LE7
1
JPB
JLED1
1
1
JPUSB1
1
JPL1
1
JPL2
JPG1
JD1
1
FAN2
FAN1
FAN5
1
FAN4
FAN3
J16
PCI1
U2
BAR CODE
1-2:ENABLE
2-3:DISABLE
JPL2:LAN2
JPL1:LAN1
2-3:DISABLE
1-2:ENABLE
JPB:BMC
JPI2C:PWR I2C
JD1:Buzzer/Speaker
COM2
FLOPPY
DDR3 1066/1333 UDIMM/RDIMM required
VG
A
CO
M1
USB4
JBT1:CMOS CLEAR
SLOT7 PCI-E X8 GEN2
JPT1:TP
M
JL1
LAN
1
JPUSB1:B/P USB WAKE UP
1-2:ENABLE
2-3:DISABLE
DIMM2B
DIMM2A
USB 10/11
JI2C1/JI2C2
USB2/3
SLOT6 PCI-E X8 GEN2
2-3:Disable
1-2:Enable
CPU
JLED1:P
ow
er
L
ED
OFF:Disable
ON:Enable
2-3:Disable
1-2:Enable
RE
V:
1.00
X8SIL
DESIGNED IN US
A
2-3:DISABLE
1-2:ENABLE
:CHASSIS INTRUSION
ON
LE
D
LED
PW
R
HD
D
NIC1
NIC2
OH/FF
X
RS
T
PW
R
I-SATA3
I-SATA4
I-SATA2
I-SATA1
I-SATA0
I-SATA5
SLOT5 PCI-E X4 on X8
SLOT4 PCI 33MHZ
KB/MOUSE
DIMM1B
JPG1: VGA
DIMM1A
JTPM
JL1
DOM PWR
JPES
1
Содержание X8SIL
Страница 1: ...USER S MANUAL Revision 1 1b X8SIL F X8SIL X8SIL V...
Страница 68: ...3 8 X8SIL X8SIL F X8SIL V User s Manual Notes...
Страница 94: ...4 26 X8SIL X8SIL F X8SIL V Notes...
Страница 96: ...A 2 X8SIL X8SIL F X8SIL V User s Manual Notes...
Страница 100: ...B 4 X8SIL X8SIL F X8SIL V User s Manual Notes...