Supero X10SRi-F, Руководство пользователя

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2-26
X10SRi-F User’s Manual
DESIGNED IN USA
1.01 REV:
X10SRi-F
JP3
JTP
M1
JF1
JD1
J23
T-SGPIO1
T-SGPIO2
T-SGPIO3 JOH1 JL1
JP
ME2
JWD1
JPG1 JPB1
1
JI2C2 JI2C1
JBR1
JVRM2
JVRM1
JPL1
JSD1
JSD2
JIPMB1
JPWR1
JUIDB1
LE1
LE2
LEDM1
JBT1
BT1
FAN4
FAN1 FAN2
FAN3
FANA
FAN5
J24
JPI2C1
JSTB
Y1
S-SATA3
I-SA
TA
4
I-SATA0
I-SATA1
I-SATA2 I-SATA3
S-SATA0
S-SA
TA
1
S-SATA2
I-SA
TA
5
SP1
1-2:ENABLE 2-3:DISABLE JPB1:BM
C
CPU
CPU SL
O
T5 PCI-E 3.0 X4(IN X8)
CPU SL
O
T4 PCI-E 3.0 X8
CPU SL
O
T3 PCI-E 3.0 X8
JP
ME2
2-3:ME MANUF
AC
TURUNG MODE
1-2:Norma
l
USB0/1
DIMMC2
PWR LE
D
1-3: JD1:
SPEAKER
4-7:
JBR1 1-2:Norma
l
2-3:BIOS recove
ry
:TP
M/PRO80
USB8/9
USB6/7
LED
NMI
PWR
X
USB2/3
(3.0)
HDD
NIC
1
JWD1:
Wa
tch Do
g
1-2:RST 2-3:NM
I
LAN1
DIMMA2 DIMMA1
USB10(3.0)
FF
2
NIC
OH
LAN2
RST
PWR
PWR
FAIL
USB4/5
ON
1-2:ENABLE 2-3:DISABLE JPG1:VG
A
JI2C1/JI2C
2
I2C bus f
or PCI-E slot
OF
F:
DISABLE
ON: ENABLE
PCH SL
O
T2 PCI-E 2.0 X4(IN X8)
PCH SL
O
T1 PCI-E 2.0 X2(IN X8)
COM2
COM1
DIMMB2 DIMMB1
PWR I2C
DIMMD2 DIMMD1 DIMMC1
IPMI_LAN
UID
USB11(3.0)
0N: POWER FORCE ON
JPL1:LAN1/2
1-2:ENABLE
VGA
2-3:DISABLE
LGA2011-3
1
1
CPU SL
O
T6 PCI-E 3.0 X16
BAR CODE
IPMI CODE
MAC CODE
BIOS
LICENSE
BIOS
Fan Header
Pin Definitions
Pin# Definition
1 Ground (Black)
2 2.5A/+12V
(Red)
3 Tachometer
4 PWM_Control
Fan Headers (Fan 1-Fan 5 & Fan A )
The X10SRi-F has six fan headers (Fan 1-Fan
5 & Fan A). These fans are 4-pin fan headers.
Although pins 1-3 of the onboard fan headers
are backward compatible with the traditional
3-pin fans, we recommend that you use 4-pin
fans to take advantage of the fan speed control
via IPMI interface. This allows the fan speeds
to be automatically adjusted based on the moth-
erboard temperature. Refer to the table on the
right for pin definitions.
A
B
A. Fan 1
B. Fan 2
C. Fan 3
D. Fan 4
E. Fan 5
F. Fan A
G. Chassis Intrusion
C D
E
Chassis Intrusion (JL1)
A Chassis Intrusion header is located at JL1 on
the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intru-
sion when the chassis is opened.
Chassis Intrusion
Pin Definitions (JL1)
Pin# Definition
1 Intrusion Input
2 Ground
F
G