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Select SWDMA2 to allow the BIOS to use Single Word DMA mode 2. It has a
data transfer rate of 8.3 MB/s.
Select MWDMA0 to allow the BIOS to use Multi Word DMA mode 0. It has a
data transfer rate of 4.2 MB/s.
Select MWDMA1 to allow the BIOS to use Multi Word DMA mode 1. It has a
data transfer rate of 13.3 MB/s.
Select MWDMA2 to allow the BIOS to use Multi-Word DMA mode 2. It has a
data transfer rate of 16.6 MB/s.
Select UDMA0 to allow the BIOS to use Ultra DMA mode 0. It has a data transfer
rate of 16.6 MB/s. It has the same transfer rate as PIO mode 4 and Multi Word
DMA mode 2.
Select UDMA1 to allow the BIOS to use Ultra DMA mode 1. It has a data transfer
rate of 25 MB/s.
Select UDMA2 to allow the BIOS to use Ultra DMA mode 2. It has a data transfer
rate of 33.3 MB/s.
Select UDMA3 to allow the BIOS to use Ultra DMA mode 3. It has a data transfer
rate of 44.4 MB/s.
Select UDMA4 to allow the BIOS to use Ultra DMA mode 4. It has a data transfer
rate of 66.6 MB/s.
Select UDMA5 to allow the BIOS to use Ultra DMA mode 4. It has a data transfer
rate of 100 MB/s.
Select UDMA6 to allow the BIOS to use Ultra DMA mode 4. It has a data transfer
rate of 133 MB/s.
S.M.A.R.T. For Hard disk drives
Self-Monitoring Analysis and Reporting Technology (SMART) can help predict
impending drive failures. Select Auto to allow the AMI BIOS to automatically de-
tect hard disk drive support. Select Disabled to prevent the AMI BIOS from using
the S.M.A.R.T. Select Enabled to allow the AMI BIOS to use the S.M.A.R.T. to
support hard drive disk. The options are Disabled, Enabled, and
Auto
.
32Bit Data Transfer
Select Enable to enable the function of 32-bit IDE data transfer. The options are
Enabled
and Disabled.
PCI/PnP Confi guration
Clear NVRAM
This feature clears the NVRAM (Non-Volatile Random Access Memory) during
system boot. The options are
No
and Yes.
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Страница 5: ...v Preface Notes...
Страница 23: ...Chapter 2 Server Installation 2 9 1 4 1 4 Figure 2 5 Securing the Chassis to the Rack...
Страница 25: ...Chapter 2 Server Installation 2 11 Figure 2 6 Accessing the Inside of the System 1 2 1 3 1 2 1 4...
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