Chapter 2: Installation
2-15
3
2
1
1
DESIGNED IN USA
A1SRM-LN7F/LN5F
REV:1.01
BIOS
LICENSE
BAR CODE
T21
J3
SRW1
SRW2
SRW3
SRW4
JF3
JPW2
JF2
FAN2
FAN1
FAN3
I-SA
TA
1
I-SA
TA
2
I-SA
TA
0
I-SATA3
I-SATA5
I-SATA4
JD1
COM2
JUIDB1
VGA
JIP
MB1
JTPM1
JSD1
JWD1
JI2C2
JI2C1
JPG1
JBAT1
SP1
LED3
LED8
LED7
LED2
JPW1
JF1
JL1
JOH1
JPI2C1
JSTBY1
T11 T9
T7
T5
T24
T23
T22
T18
T20
T1
T16
T17
T14
T15 T13
T12 T10
J4
T19
T4
T6
T2
T3
T8
LAN
BY
PA
SS LE
D
M_SATA
USB 2.0-4/5
COM1
USB2.0 6/7
LAN5 USB2.0 2/3
USB 2.0-1
LAN6/LAN7
PCI-E 2.0X4
JBT1
LAN 1/2/3/4/5 LED
LAN3/LAN4
DOM POWER
SATA
LAN1/LAN2
DIMMA
2
DIMMA
1
CPU
DIMMB
1
DIMMB
2
JPCIE1
Power Button
OH/Fan Fail
1
NIC7 Activity LED
Reset Button
2
HDD LED
FP PWR LED
Reset
PWR
3.3 V
3.3V Stby
Ground
Ground
19
20
X
Ground
NMI
X
NIC6 Activity LED
3.3V Stby
3.3V Stby
UID LED
3.3V
PWR Fail
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin definitions.
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin definitions.
NMI Button
Pin Definitions (JF1)
Pin# Definition
19
Control
20
Ground
Power LED
Pin Definitions (JF1)
Pin# Definition
15
3.3V
16
PWR LED
Front Control Panel Pin Definitions
A. NMI Button
B. PWR LED
A
B