Supero SUPER P4SPA+, Руководство пользователя

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S
UPER P4SPA+/P4SPE User’s Manual
B-2
POST (hex) Description
0Fh Reserved
10h Auto detect flash type to load appropriate flash R/W codes into the
run time area in F000 for ESCD & DMI support.
11h Reserved
12h Use walking 1’s algorithm to check out interface in CMOS
circuitry. Also set real-time clock power status, and then check for
override.
13h Reserved
14h Program chipset default values into chipset. Chipset default
values are MODBINable by OEM customers.
15h Reserved
16h Initial Early_Init_Onboard_Generator switch.
17h Reserved
18h Detect CPU information including brand, SMI type (Cyrix or
Intel) and CPU level (586 or 686).
19h Reserved
1Ah Reserved
1Bh Initial interrupts vector table. If no special specified, all H/W
interrupts are directed to SPURIOUS_INT_HDLR & S/W
interrupts to SPURIOUS_soft_HDLR.
1Ch Reserved
1Dh Initial EARLY_PM_INIT switch.
1Eh Reserved
1Fh Load keyboard matrix (notebook platform)
20h Reserved
21h HPM initialization (notebook platform)
22h Reserved
23h 1. Check validity of RTC value:
e.g. a value of 5Ah is an invalid value for RTC minute.
2. Load CMOS settings into BIOS stack. If CMOS checksum fails, use default
value instead.
3. Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into
consideration of the ESCD’s legacy information.
4. Onboard clock generator initialization. Disable respective clock resource to
empty PCI & DIMM slots.
5. Early PCI initialization:
-Enumerate PCI bus number
-Assign memory & I/O resource
-Search for a valid VGA device & VGA BIOS, and put it
into C000:0.
24h Reserved
25h Reserved
26h Reserved
27h Initialize INT 09 buffer
28h Reserved
29h
"
Program CPU internal MTRR (P6 & PII) for 0-640K memory address.
"
Initialize the APIC for Pentium class CPU.
"
Program early chipset according to CMOS setup. Example: onboard IDE
controller.
"
Measure CPU speed.
"
Invoke video BIOS.
2Ah Reserved
2Bh Reserved
2Ch Reserved