Supero H8QC8+, Руководство пользователя

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Chapter 1: Introduction
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1-2 Chipset Overview
The H8QC8(+)/H8QCE(+) serverboard is based on the nVidia nForce Pro 2200
(CK804) and AMD 8132 chipset components. The 2200 functions as a Media and
Communications Processors (MCP) while the 8132 acts as the PCI hub. Both
hubs connect to the processors and through them to system memory (the memory
controllers are integrated directly into the AMD Opteron processors).
2200 Media and Communications Processor
The 2200 (CK804) is a single-chip, high-performance HyperTransport peripheral
controller. The 2200 includes a 20-lane PCI Express interface, an AMD Opteron 16-
bit Hyper Transport interface link, a four-port Serial ATA interface, a dual UDMA/133
bus master interface and a USB 2.0 interface. The IPMI and LPC buses also
connect to the 2200.
8132 HyperTransport PCI-X Tunnel
This hub includes AMD-specifi c technology that provides two PCI-X bridges with
each bridge supporting a 64-bit data bus as well as separate PCI-X operational
modes and independent transfer rates. Each bridge supports up to fi ve PCI mas-
ters that include clock, request and grant signals. It also interfaces directly with
the Ethernet controllers. On the H8QC8(+), the SCSI channels are linked directly
to the 8132.
HyperTransport Technology
HyperTransport technology is a high-speed, low latency point to point link that was
designed to increase the communication speed by a factor of up to 48x between
integrated circuits. This is done partly by reducing the number of buses in the
chipset to reduce bottlenecks and by enabling a more effi cient use of memory in
multi-processor systems. The end result is a signifi cant increase in bandwidth
within the chipset.