2-10
X6DHR-8G2/X6DHR-iG2 User's Manual
Power LED
The Power LED connection is lo-
cated on pins 15 and 16 of JF1.
Refer to the table on the right for
pin definitions.
NMI Button
The non-maskable interrupt button
header is located on pins 19 and
20 of JF1. Refer to the table on
the right for pin definitions.
Pin
Number
19
20
Definition
Control
Ground
NMI Button Pin
Definitions (JF1)
Pin
Number
15
16
Definition
Vcc
Control
PWR_LED Pin Definitions
(JF1)
K B
DIMM 4B
M
ouse
U S B
0 / 1
J 1 4
COM1
DIMM 4A
DIMM 3B
DIMM 3A
DIMM 2B
DIMM 2A
DIMM 1B
DIMM 1A
GLAN1
GLAN2
V
G
A
S
C
S
I C
h
B
Battery
VGA Enable
LAN Enable
RAGE-
X L
P X H
PCI-X 133 MHz (Slot 6)
PCI-X 100 MHz (Slot 7)
E 7 5 2 0
North Bridge
ICH5R
( S o u t h
Bridge)
7 9 0 2
S C S I
C T R L
ID
E
#
1
IDE #2
Floppy
SCSI Ch A
W O L
COM2
F
a
n
3
B I O S
(FP)USB2/3
J D 2
J P 9
CLR CMOS
Force
P W O n
WOR
S P K
S W
JPA1
JBT1
FAN5
SATA0
F
P
C
T
R
L
J
F
1
F A N 2
F A N 1
2 0 - P i n P W
8 Pin
C P U
4-Pin
P W
PW SMB
P W
L E D
CH
I n t
J L 1
W D
CPU1
CPU2
JPA3
JP
A
2
S C S I
C H B
T e r m
OHLED
J 3 3
J 3 4
J 7
J A 2
J D 1
J A 1
J 5
J 6
J 1 2
J1B1
J1D1
J 3 8
J 3 2
P W
F a i l
S P K R
J 1 6
SXB-E x8
SXB-E x8
IPMI
GLAN
Controller
Z C R
J P G 1
J P L 1
S M B
J 1 1
SCSI Enable
J O H
S
C
SI
C
H
B
Term
J P 6
SATA1
FAN
4
JP11
JP10
Alm
Reset
3rd PS
Detect
S I/O
Power Button
Overheat LED
1
NIC1 LED
Reset Button
2
Power Fail LED
HDD LED
Power LED
Reset
Pwr
Vcc
Vcc
Vcc
Vcc
Ground
Ground
19
20
Vcc
X
Ground
NMI
X
NIC2 LED
Vcc
NMI
PWR LED