47
Chapter 2: Installation
SGPIO Headers
There are two Serial Link General Purpose Input/Output (I-SGPIO1, I-SGPIO2) headers
located on the motherboard. The SGPIO headers are used to communicate with the enclosure
management chip on the back panel.
IPMI CODE
BAR CODE
DESIGNED IN USA
MAC CODE
MEGERAC
LICENSE
+
+
ASpeed
AST2500
Intel
C242
Intel
i210
VGA
JD1
CPU SLOT4 PCI-E 3.0 X4(IN X8)
CPU SLOT6 PCI-E 3.0 X8(IN X16)
CPU SLOT5 PCI-E 3.0 X4(IN X8)
JSTBY1
JTPM1
JPWR1
JF1
I-SA
TA4
I-SA
TA5
I-SGPIO2
I-SGPIO1
JPWR2
JPI2C1
FAN4
FAN3
FAN2
FAN1
FANA
JIPMB1
JSD1
JSD2
BT1
JL1
SP1
MH11
MH10
JUIDB1
LE1
LEDBMC
LE3
LEDPWR
JBT1
I-SATA0
I-SATA3
I-SATA2
I-SATA1
JPG1
JOH1
X11SCL-F
REV:1.01
DIMMA2
DIMMA1
DIMMB2
DIMMB1
USB10(3.0)
USB8/9(3.0)
USB4/5
USB2/3
COM1
USB0/1
IPMI_LAN
USB6/7(3.0)
LAN2
CPU
NMI
JF1
LED PWR
X
LED HDD
NIC
LED UID
2
NIC
1
RST
PWR
ON
FAIL PS
M.2 PCI-E 3.0 X4
COM2
LAN1
JPME2
JWD1
1. Chassis Intrusion Header
2. I-SGPIO1 Header
3. I-SGPIO2 Header
1
3
2
Chassis Intrusion
A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to
the table below for pin definitions.
Chassis Intrusion
Pin Definitions
Pin#
Definition
1
Intrusion Input
2
GND
SGPIO Header
Pin Definitions
Pin#
Definition
Pin#
Definition
1
NC
2
NC
3
GND
4
DATA Out
5
Load
6
GND
7
Clock
8
NC
NC = No Connection
I-SGPIO 1/2
I-SGPIO1
I-SATA 3.0 Ports 0-3
I-SGPIO2
I-SATA 3.0 Ports 4-5
Содержание X11SCL-F
Страница 1: ...USER S MANUAL Revision 1 0c X11SCL F...
