Supermicro X11DPG-QT, Руководство пользователя

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52
Super X11DPG-QT User's Manual
Trusted Platform Module/Port 80 Header
Pin Definitions
Pin# Definition Pin# Definition
1 P3V3 2 SPI_TPM_CS_N
3 PCIE_RESET_N# 4 SPI_PCH_MISO
5 SPI_PCH_CLK# 6 Ground
7 SPI_PCH_MOSI 8 N/A
9 JTPM1_P3V3A 10 IRQ_TPM_SPIN_N
TPM Header
The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which is
available from SMCI (optional). A TPM/Port 80 connector is a security device that supports
encryption and authentication in hard drives. It allows the motherboard to deny access if the
TPM associated with the hard drive is not installed in the system. Refer to the table below
for pin definitions.
1. TPM/Port 80 Header
2. Chassis Intrusion
Chassis Intrusion
Pin Definitions
Pins Definition
1 Intrusion Input
2 Ground
X1
1DPG-QT
DESIGNED IN USA
REV
:1.10A
IPMI CODE MAC CODE
SAN MAC
BAR CODE
BIOS
LICENSE
CPU1
CPU2
JBT1
PCH
BT1
BMC
VGA COM1
USB 0/1 IPMI_LAN
USB 4/5 (3.0)
LAN 1 LAN 2
FAN 3
FAN 4
FAN 6
FAN 1 FAN 5
FAN 2
FAN A
FAN B
P2-DIMMD2 P2-DIMMD1 P2-DIMME1 P2-DIMMF1
P1-DIMMA2 P1-DIMMA1 P1-DIMMB1 P1-DIMMC1
JUIDB1
(UID)
LED2
(UID-LED)
LEDM1
JPWR1
JPWR2
JPWR3
LAN
CTRL
P1-DIMMF1 P1-DIMME1 P1-DIMMD1 P1-DIMMD2
P2-DIMMC1 P2-DIMMB1 P2-DIMMA1 P2-DIMMA2
JNCSI1
JTBT1
JPCIE1
1
JPCIE10
(CPU2 SLOT1
1 PCI-E 3.0 x4 (IN x8))
(CPU2 SLOT10 PCI-E 3.0 x16)
JPCIE8 JPCIE9
(CPU2 SLOT8 PCI-E 3.0 x16)
JNVI2C2
JNVI2C1
(CPU1 SLOT9 PCI-E 3.0 x16)
JPCIE6 JPCIE4
(CPU2 SLOT6 PCI-E 3.0 x16) (CPU1 SLOT4 PCI-E 3.0 x16)
JPCIE2
(CPU1 SLOT2 PCI-E 3.0 x16)
JGPIO_P2: CPU2-HSSI GPIO JGPIO_P1: CPU1-HSSI GPIO
S-UM12
JPI2C1
JPWR4
LEDPWR
JF1
JHD_AC1 AUDIO_FP
JSPDIF_IN1
JPAC1
JPME2
JTPM1
COM2
JPTG1
JRK1
JIPMB1
JVRM_SEL1
JWD1
JSEN1
JSTBY1
I-SATA0~3 I-SATA4~7
USB 6/7 (3.0)
USB 2/3
S-SATA4
S-SATA5
USB8 (3.0)
SP1
M.2 CONNECTOR
JSD1 JSD2
S-SGPIO
JL1
FAN C FAN D
1
2
Chassis Intrusion
A Chassis Intrusion header is located at JL1 on the motherboard. Connect an appropriate
cable from JL1 to the chassis so that you can be informed of a chassis intrusion (via IPMI)
when the system case is opened. Refer to the table below for pin definitions.