Chapter 4: UEFI BIOS
61
is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are
None
, Hardware RTS/CTS, and Software Xon/Xoff.
Data Bits
Use this feature to set the data transmission size for Console Redirection. The options are
7 and
8
.
Parity
A parity bit can be sent along with regular data bits to detect data transmission errors. Select
Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if
the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do
not want to send a parity bit with your data bits in transmission. Select Mark to add a mark
as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity
bit to be sent with your data bits. The options are
None
, Even, Odd, Mark, and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are
1
and 2.
CPU Configuration
SMT Control
Use this setting to specify Simultaneous Multithreading. Options include Off for 1T single
thread and
Auto
for 2T two-thread if your system is capable of it.
Core Performance Boost
This setting is used to configure for Core Performance Boost. Options include Disabled and
Auto
.
Global C-state Control
This setting is used to configure for Global C-state Control. Options include Disabled, Enabled
and
Auto
.
Local APIC Mode
Use this setting to adjust local APIC mode. Options include xAPIC, x2APIC and
Auto
.
CCD Control
Use this setting to disable CCDs in the CPU. Options include
Auto
, 2 CCDs, 3 CCDs, 4
CCDs and 6 CCDs.