Supermicro C7Z270-CG-M, Руководство пользователя

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Chapter 2: Installation
2-25
DOM PWR Connector (JSD1)
The Disk-On-Module (DOM) power con-
nector, located at JSD1, provides 5V
(Gen1/Gen) power to a solid state DOM
storage device connected to one of the
SATA ports. See the table on the right
for pin definitions.
DOM PWR
Pin Definitions
Pin# Definition
1 5V
2 Ground
3 Ground
A.DOM PWR
B. S/PDIF OUT
SPDIF OUT (JSPDIF_OUT)
The SPDIF Out (JSPDIF_OUT) is used for
digital audio output. You will also need
the appropriate cable to use this feature.
SPDIF_OUT
Pin Definitions
Pin# Definition
1 S/PDIF_Out
2 Ground
COM1
JPME2
JSD1:S
ATA DOM PW
R
JSD1
TPM/PO
RT80
JTPM1:
JTPM1
PWR ON
RST
OH/F
F
X
X
NIC
1
HDD LED
JF1
PWR LED
USB 8/9(3.0)
SPEAKER:Pin1-4
JD1:
JD1
AUDIO FP
USB 0/1
TH1 JL1
JSTBY1
1-2:RST
2-3:NMI
WATCH DOG JWD1:
JL1:
CHASSIS
INTRUSION
JBR1
JI2C2
LED4
1-2:NORMAL
2-3:ME MANUFACTURING MODE
JPME2:
PCH SLOT1 PCI-E 3.0 X4
JI2C1
JWD1
I-SATA5
I-SATA4
JBT1
5V STBY POWER JSTBY1:
JBT1:CMOS CLEAR
2-3:BIOS RECOVERY 1-2:NORMAL
ON :ENABLE
OFF:DISABLE
JI2C1/JI2C2
I-SATA3
I-SATA2
JBR1
CPU SLOT2 PCI-E 3.0 X8(INX16)
I-SATA1
I-SATA0
PCIE M.2 CONNECTOR 2
22110
JSPDIF_OUT
HD AUDIO
CPU SLOT3 PCI-E 3.0 X16
PCIE M.2 CONNECTOR 1
JAUDIO1
DIMMB1
DIMMA2
DIMMA1
SYS_FAN2
USB 11(3.1)
USB 10(3.1)
JUSBC
CPU
SYS_FAN1
USB 4/5/6/7(3.0)
DVI
JPW1
2-3 DISABLE
JPUSB1:USB2/3(3.0)WAKE UP
1-2 ENABLE
HDMI/DP
CPU_FAN2
CPU_FAN1
CLEAR
RESET
CMOS
BUTTON
JVR1
BUTTON
POWER
JPUSB1
JPW2
KB/MOUSE USB 2/3(3.0)
MH9
S4
MH4
JPUSB1
MH3
JPW1
S8
S11
JUSBLAN1
JUSBC
B1
JSPDIF_OUT
LED5
MH8
MH7
MH2
LED2
SYS_FAN2
J226
J37
TH1
JPME2
JD1
JI2C2
J9702
JF1
JUSB30_I4
JL1
JSTBY1
JCOM1
JI2C1
J9701
MH6
TP80
LE
D4
JW
D1
LED11
LED12
MH1
BAR CODE
REV:1.00
C7Z270-CG-M
1
MAC CODE
+
BIOS LICENSE
3
7
3
1
4
3
1
1
2
3
3
LED10
LED1
2280
2260
2280
2260
2242
DIMMB2
A
B