Supermicro 7045A-C3, Руководство пользователя

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7-14
SERIES3800/S120T
(7045A-C3/7045A-CT)
User's Manual
X
CPU Cache Control
Access the submenu to make changes to the following settings.
Direct Cache Access (Available when supported by the CPU)
Set to Enable to route inbound network IO traffi c directly into processor caches
to reduce memory latency and improve network performance. The options are
Disabled and Enabled.
DCA Delay Clocks(Available when supported by the CPU)
This feature allows the user to set the clock delay setting from snoop to prefetch
for Direct Cache Access. Select a setting from 8 (bus cycles) to 120 (bus cycles)
(in 8-cycle increment). The default setting is 32 (bus cycles) .
X
I/O Device Confi guration
Access the submenu to make changes to the following settings.
KBC Clock Input
This setting allows you to select clock frequency for KBC. The options are 6MHz,
8MHz, 12MHz and 16MHz.
Serial Port A
This setting allows you to assign control of serial port A. The options are Enabled
(user defi ned), Disabled and Auto (BIOS or OS controlled).
Base I/O Address
This setting allows you to select the base I/O address for serial port A. The options
are 3F8 , 2F8, 3E8 and 2E8.
Interrupt
This setting allows you to select the IRQ (interrupt request) for serial port A. The
options are IRQ3 and IRQ4 .
Serial Port B
This setting allows you to assign control of serial port B. The options are Enabled
(user defi ned), Disabled, Auto (BIOS controlled) and OS Controlled.
Mode
This setting allows you to set the type of device that will be connected to serial port
B. The options are Normal and IR (for an infrared device).