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Version 1.0
Page 26 of 44
SMT370v2 User Manual
Register settings.
Register 0x0 – DAC Register (report to
datasheet for more details).
Bit
number
Description
Bit 31
0
Bit 30
0
Bit 29
0
Bit 28
0
Bit 27-24
Not Used.
Bit 23
SDIO bidirectional. ‘0’=Input or ‘1’=I/O -
To be set to ‘0’ when using default
firmware.
Bit 22
LSB, MSB first. ‘0’=MSB or ‘1’=LSB –
To be set to ‘0’ when using default firmware
.
Bit 21
Software reset on logic ‘1’
Bit 20
Sleep Mode. ‘1’=shuts down the DAC output currents.
Bit 19
Power-Down Mode. ‘1’=shuts down all digital and analogue functions.
Bit 18
1R/2R Mode DAC.
Bit 17
PLL_LOCK indicator – (only on read back)
Bit 16
Not Used.
Bit 15
Filter interpolation rate – Bit 1 (1x, 2x, 4x or 8x).
Bit 14
Filter interpolation rate – Bit 0 (1x, 2x, 4x or 8x).
Bit 13
Modulation mode – Bit 1 (None, f
s
/2, f
s
/4 or f
s
/8).
Bit 12
Modulation mode – Bit 0 (None, f
s
/2, f
s
/4 or f
s
/8).
Bit 11
Enable zero stuffing. ‘0’=No zero stuffing on interpolation filter or ‘1’=Enables zero
stuffing.
Bit 10
Mix Mode. ‘0’=Complex and ‘1’=Real.
Bit 9
‘0’=e
-jw
or ‘1’=e
+jw
Bit 8
DATACLK/PLL_LOCK select. ‘0’=PLLLOCK or ‘1’=DATACLK.
Bit 7
‘0’=Signed Input Data (Two’s complement) or ‘1’=Unsigned (Binary).
Bit 6
‘0’=Two Port Mode or ‘1’=One Port Mode.
Bit 5
DATACLK Driver strength
Bit 4
DATACLK Invert. ‘0’=No Invert or ‘1’=Invert.
Bit 3
Not Used.
Bit 2
ONEPORTCLK Invert. ‘0’=No invert or ‘1’=Invert.
Bit 1
IQSEL Invert. ‘0’=No invert or ‘1’=Invert.
Bit 0
Q first. ‘0’=I first or ‘1’=Q first.