Detailed description
STCF03
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9 Detailed
description
9.1 PowerON
reset
This mode is initiated by applying a supply voltage above the V
PW_ON RESET
threshold
value. An internal timing (~1 µs) defines the duration of this status. The logic blocks are
powered, but the device doesn't respond to any input. The registers are reset to their default
values, the ATN and SDA pins are in high-Z, and the I
2
C slave address is internally set by
reading the ADD pin configuration. After the internally defined time has elapsed, the
STCF03 automatically enters the Stand-by mode.
9.2
Shutdown, shutdown with NTC
In this mode only the I
2
C interface is alive, accepting I
2
C commands and register settings.
The device enters this mode: automatically from Power ON Reset status; by resetting the
PWR_ON bit from other operation modes. Power consumption is at the minimum (1 µA max)
if NTC is not activated (NTC_ON=0). If PWR_ON and NTC_ON is set, the T1 is switched
ON (see the block diagram), allowing the µP to measure the LED temperature through its
A/D converter. When NTC circuits are active and the V
REF-EXT
is present, the typ. current
consumption is increased to 1 µA, then it is recommended not to leave the STCF03 in this
status if battery drain has to be minimized.
9.3 Ready
mode
In this mode all internal blocks are turned ON, but the DC/DC converter is disabled and the
White LED is disconnected. The NTC circuit can be activated to monitor the temperature of
the LED and I
2
C commands and register settings are allowed to be executed immediately.
Only in this mode the Auxiliary LED is operational and can be turned ON and set at the
desired brightness using the AUX REGISTER. The device enters this mode: from Stand-by
by setting the PWR_ON bit; from Flash operation by resetting the TRIG pin or the TRIG_EN
bit or automatically from Flash operation when the Time Counter reaches zero; from Torch
operation by resetting the TCH_ON bit. The device automatically enters this mode also
when an overload or an abnormal condition has been detected during Flash or Torch
operation (
Table 16: Status register details
9.4
Single or multiple Flash using external (µP) temporization
To avoid the I
2
C bus time latency, it is recommended to use the dedicated TRIG pin to define
the Flash duration (hard-triggering). The TRIG_EN bit of CMD_REG should be set before
starting each flash operation, because it could have been reset automatically in the previous
flash operation. Flash duration is determined by the pulse length that drives the TRIG pin.
As soon as the Flash is activated, the system needs typically 1.2 ms to ramp up the output
current on the Power LED. The internal Time Counter will Time-out flash operation and keep
the LED dissipated energy within safe limits in case of Software deadlock; FTIM register has
to be set first, either in Stand-by or in Ready Mode. Multiple flashes are possible by strobing
the TRIG pin. Time out counter will cumulate every flash on-time until the defined time out is
reached unless it is reloaded by updating the CMD_REG. If single or multiple Flash
operation is timed-out, the device automatically goes in Ready mode by resetting the
