ST QFN20, Руководство пользователя, Страница: 17 / 35

Introduction STCF03
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7.8 Writing to a single register
Writing to a single register starts with a START bit followed by the 7 bit device address of
STCF03. The 8
th
bit is the R/W bit, which is 0 in this case. R/W = 1 means a reading
operation. Then the master waits for an acknowledge from STCF03. Then the 8 bit address
of register is sent to STCF03. It is also followed by an acknowledge pulse. The last
transmitted byte is the data that is going to be written to the register. It is again followed by
an acknowledge pulse from STCF03. Then master generates a STOP bit and the
communication is over. See
Figure 9 below.
7.9 Interface protocol
The interface protocol is composed:
– A start condition (START)
– A Device a R/W bit (read =1 / write =0)
– A Register address byte
– A sequence of data n* (1 byte + acknowledge)
– A stop condition (STOP)
Table 8. Interface protocol
Device a R/W bit Register address Data
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
S
T
A
R
T
M
S
B
L
S
B
R
W
A
C
K M
S
B
L
S
B
A
C
K
M
S
B
L
S
B
A
C
K
S
T
O
P
Figure 9. Writing to a single register
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
A
C
K
ADDRESS OF
REGISTER
DATA
A
C
K A
C
K S
T
O
P
M
S
B
M
S
B
L
S
B
L
S
B
SDA LINE
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
A
C
K
ADDRESS OF
REGISTER
DATA
A
C
K A
C
K S
T
O
P
M
S
B
M
S
B
L
S
B
L
S
B S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
A
C
K
ADDRESS OF
REGISTER
DATA
A
C
K A
C
K S
T
O
P
M
S
B
M
S
B
L
S
B
L
S
B
SDA LINE