Schematic description
AN4070
20/53
Doc ID 022934 Rev 1
3 Schematic
description
This section of the application note is intended to provide information on the main circuits
adopted in the MIC design.
The two main power processing stages of the microinverter are shown in
Figure 10
. The
input filter capacitance is realized with the parallel connection of fourteen, 100 V, 1 µF
ceramic capacitors. The two DC-DC converter MOSFETs have the source pins connected
to ground and the drain connected both to the high frequency transformer and one of the
input chokes. A 100 V Zener diode is connected between the drain and the source of each
MOSFET in order to limit the voltage across the device whenever this exceeds the clamping
voltage of the Zener itself. This may happen when the inductor current is suddenly
interrupted. Separate gate resistances for turn-on and turn-off allow to independently control
the two switching transitions.
The high frequency transformer is connected between the input stage and the rectifier stage
of the DC-DC converter. The transformer is realized with a very low value of leakage
inductance which is beneficial both to efficiency and reliability of the converter since the
maximum drain to source voltage, appearing at turn-off due to the energy stored in this
parasitic element, is limited and never exceeds the breakdown voltage of the input
MOSFETs.
The high voltage DC bus is realized with four 22 µF, 450 V electrolytic capacitors and a
2.2 µF, 600 V plastic film capacitor. The DC-AC converter is supplied from this bus and used
to inject current into the grid at 50 Hz or 60 Hz. In the low frequency leg, the low-side device
is kept in conduction when the grid voltage is positive while the high-side device is kept in
conduction for the period during which the grid voltage is negative. Two complementary
sinusoidal PWM signals are provided to the gate driving network of the high frequency leg
devices to ensure sinusoidal output current and voltage waveforms. The inverter is
interfaced to the grid via an LCL filter. A relay is used to connect and disconnect the inverter
from the grid whenever required by the application. The schematic in
Figure 11
shows the
filtering and relay schematic section. The grid current feedback signal is obtained using a
Hall effect sensor while the grid voltage sensing is performed using a voltage transformer.
The two signals are then reported to the 0/3.3V voltage range required by the A-D
converters of the STM32F103xx microcontrollers, by means of standard circuitry based on
operational amplifiers.
Both the DC-DC converter and inverter MOSFETs are driven by 0/+15 V gate signals. The
DC-DC MOSFETs are driven by a PM8834 driver, which features two independent outputs
capable of sourcing up to 2 A of current. The DC-DC converter driver circuit is shown in
Figure 12
. The two driver outputs can also be connected in parallel to provide up to 4 A. This
configuration is used for the DC-AC converter drivers, as shown in the schematic in
Figure 13
. Two control signals are generated by the STM32F103xx: one is dedicated to the
high frequency leg and the other to the low frequency one. These two signals are sent to the
input of an ACPL 4506 opto-isolator whose output is used as an input for an L6390. This
charge pump driver generates two complimentary outputs provided with deadtime and is
characterized by an internal comparator and an internal operational amplifier which can be
used to implement short-circuit current protection for each leg of the inverter. The
demonstration board allows the implementation of this option since it is already provided
with all the necessary hardware. However, since the two shunt resistors, R11 and R14
shown in
Figure 10
, are zero Ohm resistors the short-circuit hardware protection is, in fact,
disabled and replaced by firmware overcurrent detection. The source current capability of
the L6390 is then amplified by means of four PM8834s whose outputs are directly
