Spectrum Digital TMS320DM365, Техническое описание

Страница: 37 / 140

Spectrum Digital, Inc
2-19
2.1.1.3 Key Pad Interface
The DM365 has an internal key pad controller. The key pad interface is multiplexed with
the address lines on the asynchronous EMIF. CBTLV multiplexers are used to redirect
the key pad interface to the key pad matrix. This interface can only be used when CE0
is in the NAND configuration. A control bit in the CPLD enables the Mux select on the
CBTLV multiplexers. The 16 bit switch key pad matrix is set up on a 4 x 4 matrix on the
EVM. The mapping of the switches are shown in the table below.
2.1.2 DDR2 Memory Interface
The DM365 device incorporates a dedicated 16 bit wide DDR2 memory bus. The EVM
uses a single 1 gigabit 16 bit wide memory on this bus, for a total of 128 megabytes of
memory for program, data, and video storage. The internal DDR controller uses a PLL
to control the DDR memory timing. Memory refresh for DDR2 is handled automatically
by the DM365 internal DDR controller.
2.1.3 Media Card Interface
The EVM supports 1 SD/MMC/MS and 1 SD/MMC media card interfaces. The
MMC/SD0 port is dedicated to the SD/MMC/MS media card. The insert and write
protect status can be read via CPLD register. MMC/SD1 port is configured to a second
SD/MMC media card. This port is multiplexed via CBTLV switches to be used as
general purpose I/O pins when the CPLD is appropriately configured for I/O
multiplexing. The insert and write protect pin status can be read via a CPLD register.
Table 25: Key Pad Layout
Key-A0 Key-A0 Key-A1 Key-A1
Key-B0 SW6 / KEY 2 SW7 / LEFT SW8 / EXIT SW9 / DOWN
Key-B0 SW10 / ENTER SW11 / UP SW12 KEY 1 SW13 / RIGHT
Key-B1 SW14 / MENU SW15 / REC SW16 / REW SW17 / SKIP-
Key-B1 SW18 / STOP SW19 / FF SW20 / SKIP+ SW2 / PLAY/
PAUSE