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Spectrum Digital, Inc
1-5
1.4 Memory Map
The C67xx family of DSPs has a large byte addressable address space. Program code
and data can be placed anywhere in the unified address space. Addresses are always
32-bits wide.
The memory map shows the address space of a generic 6713 processor on the left
with specific details of how each region is used on the right. By default, the internal
memory sits at the beginning of the address space. Portions of the internal memory
can be reconfigured in software as L2 cache rather than fixed RAM.
The EMIF has 4 separate addressable regions called chip enable spaces (CE0-CE3).
The SDRAM occupies CE0 while the Flash and CPLD share CE1. CE2 and CE3 are
generally reserved for daughtercards.
Figure 1-2, Memory Map, C6713 DSK
Internal Memory
Reserved Space
or
Peripheral Regs
Address
C67x Family
Memory Type
SDRAM
CPLD
Flash
Daughter
Card
6713 DSK
Internal
Memory
Reserved
or
Peripheral
EMIF CE0
EMIF CE3
EMIF CE2
EMIF CE1
0x80000000
0x90000000
0xA0000000
0xB0000000
0x00000000
0x00030000
0x90080000
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