Sony TVP-08, Руководство по обучению

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Vertical Deflection Block
Overview
The Vertical Deflection circuit uses the HS and VS signals to produce the
vertical drive, VTIM, Par or Pin and AFC signals. The HS signal is neces-
sary because the VDSP circuit works by counting down this frequency to
produce its 60Hz outputs. The HS signal goes through the H BLK Delay
circuit, which stretches the HS pulse so that it is a square wave. This
signal is then applied to the ½ H and Odd/Even circuit along with the VS
signal. This circuit produces two outputs. The first is the ½ H signal that
is a 15.734 kHz square wave. The second output is the Odd/Even pulse.
This signal is a 30Hz signal, which is used by the OSD Processor and the
BD board.
The VDSP circuit uses the VS and the ½ H signal to produce four outputs.
The V Drive output is a sawtooth wave that is applied to the V Out circuit
and then applied to the vertical yokes. The VTIM output is the vertical
timing pulse. It is also called VBLK and is used to mute the video drive
during vertical blanking. It is also inverted, called VP and is as a timing
pulse by the various CPUs in the set. This pulse is used to synchronize
the data. The Par output is a 60 Hz parabola signal that is used by the Pin
amplifier in the Horizontal circuit. The AFC output is used by the H jungle
to synchronize the H Drive signal with the Vertical drive.