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Pin No.
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
I/O
O
I
I
—
O
O
O
—
O
O
I
—
—
—
I
I
I
O
I
I
I
I/O
I/O
I/O
I/O
—
I/O
I/O
I/O
—
I/O
—
I/O
I/O
I/O
I/O
O
O
O
O
Description
Master data signal output to system controller
SPI slave select signal input from system controller
Host request signal input from system controller
Ground for serial port
Audio serial data 2 signal output (Not used)
Audio serial data 1 signal output
Audio serial data 0 signal output
Power supply for serial port (+5V)
Serial clock transmission
Word select transmission
Serial clock reception
Ground for internal logic
Power supply for internal logic (+5V)
Ground for serial port
Word select reception
Audio serial data 1 signal input
Audio serial data 0 signal input
Debug serial signal output (Not used)
Debug serial signal input (Not used)
Debug serial clock signal input (Not used)
Debug request input (Fixed at “H”)
Data input/output with S-RAM (Not used)
Ground for data bus buffer
Data input/output with S-RAM (Not used)
Power supply for data bus buffer (+5V)
Data input/output with S-RAM (Not used)
Ground for data bus buffer
General DSP input/output (Not used)
Write strobe signal output to S-RAM (Not used)
Read strobe signal output to S-RAM (Not used)
Low address strobe signal output to S-RAM (Not used)
Column address strobe signal output to S-RAM (Not used)
Pin Name
MOSI
SS
HREQ
SGND
SDO2
SDO1
SDO0
SVCC
SCKT
WST
SCKR
QGND
QVCC
SGND
WSR
SDI1
SDI0
DSO
DSI
DSCK
DR
MD7
MD6
MD5
MD4
DGND
MD3
MD2
MD1
DVCC
MD0
DGND
GPIO3
GPIO2
GPIO1
GPIO0
MRD
MWR
MRAS
MCAS
Содержание TA-VE910
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