— 67 —
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
I/O
I
I
O
—
I
I
O
—
I
I
I
I
I
I
I
I
O
O
O
O
O
O
O
O
Description
Data input with built-in amplifier (Responding to the coaxial optical module)
Data input (Responding to the optical module)
Emphasis, input bi-phase, validity flag output
Power supply (+5V)
VCO gain control input (Fixed at “H”)
VCO freerunning frequency setting input
LPF setting of PLL (Fixed at “L”)
Ground
System clock select input (384fs, 512fs) (Connected to the power supply.)
Reset input
Clock input for preventing PLL lock failure
Test input (Normally “L”)
Microcomputer IF clock input
Microcomputer IF latch/chip enable input
Microcomputer IF write data input
Microcomputer IF read data output
Microcomputer IF Sub-Q sync and ID sync output (Not used)
VCO clock output (Freerunning, 384fs, 512fs) (Not used)
128fs clock output (Not used)
Bit clock output
L/R clock output
Audio data output
PLL lock error mute output
Pin Name
DIN1
DIN2
E/DOUT
VDD
R
VIN
VCO
GND
CKSEL
XMODE
AVOCK
TST1
TST2
SCLK
XLAT
SWDT
SRDT
DQSY
CKOUT
FS128
BCK
LRCK
DATAO
EROR
• IC3311 Digital Audio Interface Receiver (CXD8521M)
Содержание TA-VE910
Страница 2: ... 2 ...
Страница 55: ...95 STR DE915 TA V909 VE910 MEMO ...