Sony TA-E9000ES - Stereo Preamplifier, Руководство по обслуживанию

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• IC2015 CXD8751Q (DIGITAL Board)
Pin No.
Pin Name
I/O Function
1 LAC3 I Not used (Fixed at “L” or “H”)
2 NC — Not used
3 WSR O Not used
4 GPIO0 O Not used
5 NC — Not used
6 VDD — Power supply (+5V)
7 NC — Not used
8 SCKR O Not used
9 SDI0 O Not used
10 DI3 I DATA input (HDO4 = “L” at DO4 output)
11 DI2 I DSP to data input 2 HDI1 “L” at RXD in output
12 DI1 I DSP to data input 1 HDI1 “H” at RXD in output
13 BCKI I DSP to data input bit clock input TXD in output
14 LRCK I DSP to data input LRCK clock input
15 DCK I 256Fs master clock assistance input Fixed at “L” or “H”
16 MCK I 256Fs master clock input
17 GND — Ground
18 BCK0 O Audio data output bit clock output (“H”
n
“L”standard)
19 LRCKO O Audio data output synchronous LRCK output (“H” : Lch)
20 RLRCK O Audio data input synchronous LRCK output (“H” : Lch)
21 LRPH I LRCK clock input phase control input (“L” : SONY standard, “H” : IIS)
22 MCPH I 256Fs master clock phase control input
23 NC — Not used
24 HALM I Corresponding DSP switch mode input
25 DO1 O First (2ch) audio data output
26 SRD O Second (2ch) audio data output
27 NC O Not used
28 VDD — Power supply (+3.3V or +5V)
29 NC — Not used
30 DO3 O Third (2ch) audio data output
31 DO4 O Fourth (2ch) audio data output
32 HDO4 I DO4 output switch mode (“H” : DO4, “L” : DI3 output)
33 HDI1 I DSP data input switch (“H” : DI1, “L” : DI2 RXD to output)
34 H2X1 I System input/output data Fs ratio switch (“H” : 2 : 1, “L” : 1 : 1)
35 HIIS I Input LRCK timing setting (“L” : SONY standard, “H” : corresponds to IIS)
36 STD I Not used (Fixed at “L” or “H”)
37 TRFS O Frame synchronous pulse output for reading DSP data
38 TCLK O Clock (256Fs) output for reading DSP data
39 GND — Ground
40 DTI I DSP reading data input
41 RFSO O Frame synchronous pulse output for writing DSP data
42 RCLKO O Clock (64Fs) output for writing DSP data
43 DRO O DSP writing data output
44 NC — Not used
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