STR-KG800
56
DIGITAL BOARD IC1010 MB91353APMT-G-117E1 (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
DAC CLK
O
Clock signal output to the D/A converter
2
XMDACMS
O
Serial data latch pulse signal output terminal Not used
3
XMDACMD1
O
Serial data output terminal Not used
4
DAC_D1
O
Serial data output to the D/A converter
5
TUNING A
I
Jog dial pulse input terminal Not used
6
TUNING B
I
Jog dial pulse input terminal Not used
7
HDMI_REG_CTRL
O
Power on/off control signal output terminal for the HDMI section "H": power on
8
DSP_SELECT
O
DSP select signal output to the switiching and data selector
9
POWER RY
O
Relay drive signal (for main power) output terminal "H": relay on
10
VOL_CL
O
Clock signal output to the electrical volume
11
VOL_DA
O
Serial data output to the electrical volume
12
HP_DETECT
I
Headphone detection signal input terminal "H": headphone is connected
13
HP_RY
O
Relay drive signal (for headphone) output terminal "H": relay on
14
C/SUR/SB
O
Relay drive signal (for center and surround) output terminal "H": relay on
15
FRONT B RY/
STER_SW
O
Relay drive signal (for front B) output terminal Not used
16
SW RY
O
Relay drive signal (for sub woofer) output terminal "H": relay on
17
FRONT A RY
O
Relay drive signal (for front A) output terminal "H": relay on
18
GND
-
Ground terminal
19
VCC
-
Power supply terminal (+3.3V)
20
SBR RY
O
Relay drive signal (for surround back) output terminal Not used
21
TUNE_LAT
O
Serial data latch pulse signal output to the tuner (FM/AM)
22
TUNE_DI
O
Serial data output to the tuner (FM/AM)
23
T_CLK
O
Serial data transfer clock signal output to the tuner (FM/AM)
24
TUNE_DO
I
PLL data input from the tuner (FM/AM)
25
FUSE_DETECT
I
Fuse detection signal input terminal
26
DAC_ATC
O
Serial data latch pulse signal output to the D/A converter
27
DAC_MUTE
O
Muting signal output to the D/A converter
28
CEC_OUT
O
CEC serial data output to the HDMI OUT connector
29
DIR_XSTATE
I
Source clock selection monitor input from the digital audio interface receiver
30
HDMI_ERR
I
HDMI audio error signal input terminal
31 to 34
V_SW4 to V_SW1
O
Video select signal output to the video ampli
fi
er
35, 36
COMP_S1, COMP_S2
O
Component video select signal output to the video ampli
fi
er
37
PS(V-MUTE)
O
Muting signal output to the video ampli
fi
er
38
DIR_XMODE(RESET)
O
Reset signal output to the digital audio interface receiver "L": reset
39
DIRCKST
O
Clock selection signal output to the digital audio interface receiver
40
GND
-
Ground terminal
41, 42
NO USE
-
Not used
Ground terminal
Power supply terminal (+3.3V)
Serial data transfer clock signal output to the digital audio interface receiver
Chip enable signal output to the digital audio interface receiver
Serial data output to the digital audio interface receiver
Serial data input from the digital audio interface receiver
PLL lock error signal and data error
fl
ag input from the digital audio interface receiver
Serial data input terminal
Non maskable interrupt signal input terminal Not used
CPU operation mode setting signal input terminal "H":
fl
ash programming
CPU operation mode setting signal input terminal Not used
54
MD0
I
CPU operation mode setting signal input terminal Not used
55
INIT
I
External reset signal input terminal
56
+3.3V
-
Power supply terminal (+3.3V)
57
X1
O
Main system clock output terminal (24 MHz)
58
X0
I
Main system clock input terminal (24 MHz)
59
GND
-
Ground terminal
60
XOA
I
Sub system clock input terminal Not used
61
X1A
O
Sub system clock output terminal Not used
62
RST_TRG
O
Reset signal output terminal
63
DIR_DATA0
I
Serial data input from the digital audio interface receiver
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