Sony STR-DE885, Руководство по обслуживанию

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STR-DE885/DE985
SECTION 4
DIAGRAMS
1 VSS — Ground
2 XRST I Reset signal input
3 EXTIN I Not used (connected to ground)
4 FS2 I Sampling frequency select signal input (connected to ground)
5 VDDI — Power supply pin (+2.5 V)
6 FS1 I Sampling frequency select signal input (connected to ground)
7 PLOCK O Internal PLL lock signal output (Not used (open))
8 VSS — Ground
9 MCLK1 I System clock signal input (13.5 MHz)
10 VDDI — Power supply pin (+2.5 V)
11 VSS — Ground
12 MCLK2 O System clock signal output (13.5 MHz)
13 MS I Master/slave operation select signal input (L : internal clock, H : EXTIN clock)
14 SCKOUT O Serial clock signal output
15 LRCKI1 I L/R sampling clock signal input (Not used (open))
16 VDDE — Power supply pin (+3.3 V)
17 BCKI1 I Bit clock signal input (Not used (open))
18 SDI1 I Audio serial data input
19 LRCKO O L/R sampling clock signal output
20 BCKO O Bit clock signal output
21 VSS — Ground
22 KFSIO I/O Audio clock signal (384fs/256fs) input/output
23 to 26 SDO1 to SDO4 O Audio serial data output
27 SPDIF O S/PDIF output (Not used (open))
28 LRCKI2 I L/R sampling clock signal input
29 BCKI2 I Bit clock signal input
30 SDI2 I Audio serial data input
31 VSS — Ground
32 HACN O Host acknowledge signal output
33 HDIN I Host serial data input
34 HCLK I Host clock signal input
35 HDOUT O Host serial data output
36 HCS I Host chip select input
37 SDCLK O Not used (open)
38 CLKEN O Not used (open)
39 RAS O Row address strobe signal output (Not used (open))
40 VDDI — Power supply pin (+2.5 V)
41 VSS — Ground
42 CAS O Column address strobe signal output (Not used (open))
43 DQM/OE0 O Not used (open)
44 CS0 O Chip select signal output
45 WE0 O Write enable signal output
46 VDDE — Power supply pin (+3.3 V)
47 WMD1 I External memory wait mode setting signal input (connected to H)
48 VSS — Ground
49 WMD0 I External memory wait mode setting signal input (connected to ground)
50 PAGE2 O External memory page select signal output (Not used (open))
51 VSS — Ground
52, 53 PAGE1, PAGE0 O External memory page select signal output (Not used (open))
54 BOOT I Boot mode control signal input (connected to ground)
55 BTACT O Boot mode display signal output (Not used (open))
4-1. IC PIN DESCRIPTIONS
• IC1501 CXD9617R (AUDIO DSP1) (DIGITAL Board (2/4))
Pin No. Pin Name I/O Pin Description