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Guide to Cell/B.E. Programming Documentation

 

 

 

 

© 2008 Sony Computer Entertainment Inc. All Rights Reserved. 

Version 1.0, August 2008 

 

Page 3 of 16  

Guide to Cell Broadband Engine Programming Documentation 

Introduction 

This Guide is designed to help you navigate the programming documentation for the Cell Broadband Engine™ 
(Cell/B.E.) processor. The documents are available on the public Sony Computer Entertainment website 
) and the IBM website (

). 

The Guide summarizes the documentation, explaining the relevance of each document to particular Cell/B.E. 
programming roles and objectives. Throughout this Guide and the documentation it summarizes, the Cell/B.E. is 
variously referred to as the Cell Processor, Cell Broadband Engine™, CBE, Cell BE, or BE.  

Figure 1, “Cell/B.E. Block Diagram” and Figure 2, “Storage Domains” define the acronyms used in the Cell/B.E. 
documentation. For a more complete glossary, see th

CBE Programming Handbook

Figure 1  Cell/B.E. Block Diagram 

 

 

Figure 2  Storage Domains 

 

Содержание Memory Stick Camera Application Version 1.0

Страница 1: ...Guide to Cell Broadband Engine Programming Documentation Version 1 0 August 2008 ...

Страница 2: ...arranties Nothing in this document shall operate as an express or implied license or indemnity under the intellectual property rights of Sony and SCEI third parties All information contained in this document was obtained in specific environments and is presented as an illustration The results obtained in other operating environments may vary THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED O...

Страница 3: ...cei co jp e_download html and the IBM website http www 128 ibm com developerworks power cell The Guide summarizes the documentation explaining the relevance of each document to particular Cell B E programming roles and objectives Throughout this Guide and the documentation it summarizes the Cell B E is variously referred to as the Cell Processor Cell Broadband Engine CBE Cell BE or BE Figure 1 Cel...

Страница 4: ...s containing 8 to 128 bit fixed point or single or double precision floating point data types An SPE consists of two main units the SPU which executes instructions and the MFC which controls DMA transfers and related functions In general the term SPU refers to the instruction execution unit and the term SPE refers to either or both of the SPU and MFC However some documents use the terms SPU and SP...

Страница 5: ...he instructions operate The target audience is application and system programmers Application Binary Interface ABI An ABI document describes the interface between compiled software machine or object code and a particular pairing of system software operating system library or other software service and microprocessor hardware The target audience is system programmers Application Programming Interfa...

Страница 6: ...amming process Document Sections The tutorial has the following sections 1 Overview of the Cell Broadband Engine A short summary of the Cell B E s hardware organization and programming methods 2 The PPE and the Programming Process A summary of the PowerPC Processor Element PPE including registers instruction sets communication and interoperability with SPEs and examples of code development and deb...

Страница 7: ...ammers Additional hardware and programming topics for the privilege state supervisor programming environment There are chapters describing the virtual storage environment memory and cache management I O architecture resource allocation PPE interrupts PPE multithreading logical partitions and hypervisors SPE context switching the time base and decrementers software objects and executables SPE loadi...

Страница 8: ...r the PPE 3 Synergistic Processor Element MMIO Registers Registers used by the SPEs 4 BEI I O Command IOC MMIO Registers Registers used by the I O interface controller for commands 5 IOC Address Translation MMIO Registers Registers used by the I O interface controller for address translation 6 Internal Interrupt Controller IIC MMIO Registers Registers used by the internal interrupt controller 7 Me...

Страница 9: ...directives and predefined macro target definitions 2 SPU Low Level Specific and Generic Intrinsics The basic intrinsics and built ins that make the underlying SPU ISA and SPE hardware accessible from the C programming language 3 Composite Intrinsics Intrinsics that can be constructed from a series of low level generic or specific intrinsics 4 Programming Support for MFC Input and Output Utility fu...

Страница 10: ...ntent A math library that takes advantage of the SIMD instructions supported by the PPE and SPEs Recommended Use Browse during first readings of the CBE Programming Handbook and refer to it thereafter as needed during coding of SIMD applications Document Sections The document has the following sections 1 Overview of the SIMD Math Library Library and header files function overviews and special case...

Страница 11: ... registers and memory accessing registers representing data in registers floating point data formats and exception conditions 4 Addressing Modes and Instruction Set Summary A summary of instructions and addressing modes for integer floating point load store flow control processor control memory synchronization and external control operations 5 Cache Model and Memory Coherency The cache model built...

Страница 12: ... Summarizes the instructions set architecture 2 Vector Register Set The software related details about how registers operate 3 Operand Conventions Conventions for storing values in registers and memory accessing registers representing data in registers floating point data formats and exception conditions 4 Addressing Modes and Instruction Set Summary A summary of instructions and addressing modes ...

Страница 13: ...entire compiler or the accompanying library routines Recommended Use Browse after browsing the PowerPC Microprocessor Family The Programming Environments Manual for 64 Bit Microprocessors and refer to it thereafter as needed during coding of PPE software Document Sections The document has the following sections 1 Introduction Summarizes RISC architectures optimizing compilers and assumptions 2 Ove...

Страница 14: ... and generate controls instructions 4 Constant Formation Instructions Descriptions of the immediate load instructions 5 Integer and Logical Instructions Descriptions of the integer logical count form select gather select bits shuffle bytes and related instructions 6 Shift and Rotate Instructions Descriptions of the shift and rotate instructions 7 Compare Branch and Halt Instructions Descriptions o...

Страница 15: ...ails for an SPE assembly language Recommended Use Browse after readings of the CBE Programming Handbook and refer to it thereafter as needed during assembly language coding of SPE applications Document Sections The document has the following sections 1 Introduction Summarizes the contents of the document 2 Instruction Set and Instruction Syntax Descriptions of notation and data formats the instruc...

Страница 16: ... Entertainment SCE PLAYSTATION 3 Developer Network http www scedev net Game Developers Conference GDC http devevents scedev net gdc Sony Computer Entertainment Europe SCEE http www technology scee net Insomniac Games http www insomniacgames com tech techpage php Cell B E Websites Sony Computer Entertainment Inc SCEI http cell scei co jp index_e html Power org http www power org resources devcorner...

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