— 53 —
KV-40XBR700
BLOCK DIAGRAM (5 OF 5)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
2
3
4
1
2
3
4
5
1
2
3
1
2
3
X3500
CN3500
X3401
X3402
X3089
CN5803
CN5802
CN5861
CN5862
S5001
20MHz
18.543956MHz
74.17524MH
20MHz
MUTE
Y
CB
CR
CB
CR
Y
VD
HD
CLK1
DAT1
VP
B INT
MID BUSY
MID-CR
MID-Y
MID-CB
TH-Y
TH-CB
TH-CR
MID-HS
MID-VS
TH CONT
2151-VS
MID YS
RPLLHD
HD2
VD10
IC3304
3CH 8BIT A/D
122
129
133
140
147
154
16M-SDRAM
13
20
32
25
49
46
42
35
19
24
27
32
2
12
39
49
36
7
8
9
10
11
14
15
16
17
18
35
55
58
56
156
157
161
31
50
63
160
3
4
5
6
12
1
13
14
READ PLL
96
95
97
162
59
Q3305
Q3089
Q3090
Q3304
Q3303
Q3408
Q3406
Q3405
Q3403
Q3407
Q3409
168
215
169
210
208
170
97
95
WP
CLK
DAT
AA
NVM
Q3091
R S T
32
IC3089
5
6
7
8
33
61
1
2
3
L-SHIFT
L-SHIFT
VCC
RST
IC3091
RESET
4
5
45
44
42
43
96
99
98
100
55
57
53
9
10
VDOYCLVL
ANYGIN
VDOCBCLVL
ANCBIN
ANCRIN
XDRCVS
DRCDCLK
XDRCHS
DXT1IN
DXT1OUT
DXT2IN
IICSDA
IICSCL
SW
SW
WE
CLK
Y0-7
CB0-7
CR0-7
DIY7
BUFF
BUFF
3.3V
VDOCRCLVL
Q3404
Q3402
BUF
BUF
BUF
BUF
BUF
BUF
10
37
9
94
93
76
91
88
DRC-MF
IVD
102
100
117
3 1
4 1
DRCYIN0
DRCYIN7
DRCCRIN0
DRCCRIN7
DRCCBIN0
DRCCBIN7
2 1
2 9
1 1
2 0
64M-SDRAM
2
1 3
3 1
4 2
4 5
5 6
7 4
8 5
2 2
2 7
6 0
6 6
9 9
1 1 9
1 4 8
1 5 7
1 5 8
1 6 7
1 2 0
1 3 4
17
18
19
20
144
143
141
135
147
146
142
140
137
SDADR12
SDADR0
SDCLKIN
SDCLK
SDCKE
SDDQM1
SDDQM0
SDCS
SDRAS
SDCAS
SDWE
WE
CAS
RAS
CS
DQM0
DQM1
DQM2
DQ0
DQ31
CLK
CKE
A0
A12
IC3402
DQM3
SDDAT0
SDDAT31
IC3414
Q3413
Q3412
Q3411
IC3413
SYNC SW
1
14
9
3
6
5
IC3411
2
7
12
Q3401
196
194
202
73
72
D/A
1 3
2 0
4 4
5 1
5 2
6 1
6 2
7 1
3
1 0
2 3
3 0
31
32
33
46
42
44
FL3401
Q3410
Q3414
Q3415
11
14
9
5
2
7
79
2
1
10
13
3
15
12
11
9
14
4
7
5
RO
GO
BO
G9
G2
B9
B2
R9
R2
CR0-7
CB0-7
Y0-7
DSPCLK
DSPY7
DSPY0
DSPCB7
DSPCB0
DSPCR0
XVDOHS
VDOCLKIN
VDOPLLHLD
IC3410
5
IC3412
1
7
AND
YUV SW
INV
3
1
201
XVDOVS
XDSPVS
XDSPHS
DSPCR7
BCK
GCK
RCK
4
5
I
O
2.5V-REG
IC3401
3.3V
74
199
IC3406
IC3405
IC3407
IC3404
2
4
9
3
4
5
4
2
4
2
AND
AND
WRITE PLL
AND
XRESET
I
O
2.5V-REG
3.3V
IC3409
2.5V
142
SDCKE
67
CKE
IC3302
2.2V REG
I
O
3.3V
1
69
XDSPYS
VIN(C)
VIN(A)
VIN(B)
XSYNC
EXTCLP
CLK
VCO IN
FINA
FINB
VCO OUT
LOGICVDD
R BIAS
VCO VDD
PFD OUT
UOUT
VOUT
YOUT
CONT
VBX3I
UEX3I
TEX3I
V3I
U3I
Y3I
BUFF
BUFF
BUFF
BUFF
BUFF
BUFF
FINB
VCO OUT
PFD INHBIT
FINA
BUFF
IC3403
RESET
Q3301
V C C - D R O P
Q 3302
V C C - D R O P
5V
3
5
WRITE PLL
IC3305
VCO OUT
FINB
LOGICVDD
VCO VDD
R BIAS
6
12
PFD OUT
VCO IN
1
13
14
4
FINA
VD1
HREF
C541
ADDR11
ADDR0
DQ15
DQ0
WPLLHD
V9O
PXI
VSTILL0
GAME
DY02
DY09
DR02
DR09
DB02
DB09
CLP
ADHD
W13I
XCAS
XRAS
XWE
DOM
XCS
VC0 LIM
CAS
RAS
CS
LDQM
UDOM
ADDR0
DQ15
DQ0
ADDR11
IC3090
MID-UCOM
IC3408
MID XA
IC3303
IC3301
IC3306
AV-SW
YCT-MAIN/YCT-SUB
COMPONENT-J/F
MID-UCOM
MID XA
MIO15
MIO0
IO1
MA0
A8
A0
2
3
5
3
2
5
3
2
2
3
IC3500
RSTB
SCL
SDA
AYO
ACI
AGND
AYI
ACO
XO
XI
FSCO
FSC1
MCAS
MWE
MOE
MRAS
RESET
C IN
9V
5V
IN
GND
COMB Y
GND
COMB C
DAT
CLK
GND
GND
Y-IN
GND
IO08
IO9
IO16
MEMORY
*WE
*OE
13
27
29
28
14
98
31
30
11
12
10
47
50
59
60
57
83
84
96
88
87
I
O
76
3.3v-REG
Q3502
BUFF
Q3500
MA7
CSI
*RAS
*UCAS
*LCAS
BUFF
BUFF
Q3508
Q3509
FL3501
BUFF
BUFF
Q3511,Q3512,Q3513
FL3502
Q3510
Q3515,Q3516,Q3517
BUFF
FL3503
Q3514
BUFF
BUFF
Q3501,Q3502,Q3503
BUFF
Q3506
13
28
2
9
16
26
2
10
31
40
99
BUFF
BUFF
FL3500
Q3505
Q3504
9V
5V
3.3v
MA8
Y/C SEP
AUTO WIDE
C0
DRC-INSEL
DRC-PXI
DRC-LINE-W
RST
VDD
X2
X1
D2
D1
C2
C1
VP-MAIN
B-INT
SUB-BUSY
O_DRC_CD_SEL
SYNC-SEL
NVM-WP
NVM-RST
D0
A
B
C
D
E
F
G
H
I
IC3501
3D COM
HH DEC
Q5807,5808
DGC MUTE
N/S DRIVE
Q5812,5809
GND
DGC-MUTE
N.C.
UNREG 7V
MAIN 12V
-IN2
OUT2
OUT1
-IN1
N/S(W)
N.C.
N.C.
N/S(B)
OUT1
OUT2
IC5805
N/S DRIVE
Q5810,5811
BUFFER
+I
N2
-IN2
OUT2
OUT1
-IN1
OUT1
OUT2
+I
N2
BUFFER
Q5864,5865
E/W DRIVE
IC5861
E/W DRIVE
BUFFER
Q5861,5863
Q5860,5862
V REF
X OUT
Y OUT
IC5870
SENSOR
E/W(T-B)
E/W(T-W)
N.C.
E/W(B-W)
N.C.
E/W(B-B)
UNREG 7V
MAIN 12V
LANDING CORRECTION
DX1A-919-BD
13
6
D(A)1
D(A)8
Y0-7
CR0-7
17
24
D(B)8
D(B)1
174
181
164
171 DIC7
DIC0
DIY0
16
71
28
59
68
67
16
11
8
7
8
2
3
2
8
6
7
8
2
3
2
8
6
4
5
6
J