Sony HW-HD5, Руководство по обслуживанию

Страница: 36 / 52

36
NW-HD5
Pin No. Pin Name I/O Description
72 PE3/RXD1 I Data input terminal Not used
73 PE4/SCK1 O
Serial clock signal output to the power control and real time clock
74 PE5/SO1 O
Serial data output to the power control and real time clock
75 PE6/SI1 I
Serial data input from the real time clock
76 PE7/SCS1 O
Chip enable signal output to the real time clock
77 XOUT/CKO O
Clock signal (176 kHz) output to the multi interface
78 DVDD1 -
Power supply terminal (+1.2V) (for core)
79 DVSS3 - Ground terminal
80 VDIO3 - Power supply terminal (+1.9V) (for I/O interface)
81 PF0/EC0/INT3 I
Interrupt request signal input from the sub system controller
82 PF1/T1 O
Shut down signal output terminal Not used
83 PF2/EC2/INT4 I
Interrupt request signal input from the multi interface
84 PF3/T3 O
Clock signal (176 kHz) output to the power control
85 PF4/BEEP O
Beep signal output to the headphone amplifier
86 PG0/DACK0 I
Ready/busy selection signal input from the flash memory "L": busy, "H": ready
87
PG1/DREQ0/INT5
I Interrupt request signal input from the sub system controller
88
PG2/DACK1/INT6
I Interrupt request signal input from the multi interface
89 PG3/DREQ1/INT7 I
Interrupt request signal input from the multi interface
90 to 93
TEST2, TEST3,
TEST0, TEST1
I
Input terminal for the test mode setting
94 TACK O
Bus response signal output terminal Not used
95 EVA I
EVA mode selection signal input terminal Not used
96 AVSAD -
Ground terminal (for A/D converter)
97 AVDAD -
Power supply terminal (+2.4V) (for A/D converter)
98 AN0 I Battery voltage monitor input terminal (A/D input)
99 AN1 I Not used
100 AN2 I Acceleration detection signal of X shaft direction input from the acceleration sensor
101 AN3 I
Acceleration detection signal of Y shaft direction input from the acceleration sensor
102 AN4 I
Acceleration detection signal of Z shaft direction input from the acceleration sensor
103, 104 AN5, AN6/INT8 I
Set key input terminal (A/D input)
105 AN7/INT9 I
Remote commander key input terminal (A/D input)
106 RST I
Reset signal input from the power control
107 RAMBK I RAM back up control signal input terminal Not used
108 VDBK - Power supply terminal (+1.2V) (for RAM back up)
109 TDI I Data input terminal (for JTAG) Not used
110 TMS I
Test mode control signal input terminal (for JTAG) Not used
111 TCK I
Clock signal input terminal (for JTAG) Not used
112 TRST I
Reset signal input terminal (for JTAG) Not used
113 TDO O
Data output terminal (for JTAG) Not used
114 VDIOJT -
Power supply terminal (+1.9V) (for JTAG)
115 DVDD2 -
Power supply terminal (+1.2V) (for core)
116 DVSS4 - Ground terminal
117 VDIO4 - Power supply terminal (+1.9V) (for I/O interface)
118 PD0/CONNECT I
Battery in detect switch input terminal
119 PD1/XVDATA O
Test terminal for debug Not used