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VIDEO BOARD IC505 M30624MGA-A17FP (CD MECHANISM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
SENSE
I
Internal status (SENSE) signal input from the CXD3008Q (IC101)
2
SENSE CLK
O
Sense serial data reading clock signal output to the CXD3008Q (IC101)
3
DSP DATA
O
Serial data output to the CXD3008Q (IC101)
4
DSP LATCH
O
Serial data latch pulse output to the CXD3008Q (IC101)
5
DSP CLK
O
Serial data transfer clock signal output to the CXD3008Q (IC101)
6
LDON
O
Laser on/off selection signal output to the CXA2568M (IC103) “H”: laser on
7
REMOTE IN
I
Remote control signal input terminal Not used (open)
8
BYTE
I
External data bus line byte selection signal input “H”: 8 bit, “L”: 16 bit (fixed at “H”)
9
CNVSS
—
Ground terminal
10
DSP MUTE
O
Muting on/off control signal output to the CXD3008Q (IC101) “H”: muting on
11
CTRL1
O
Clock selection signal output to the CXD3008Q (IC101)
“L”: 16.9344 MHz (double speed), “H”: 33.8688 MHz
12
XRESET
I
Reset signal input from the system controller (IC101) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
13
XOUT
O
Main system clock output terminal (10 MHz)
14
VSS
—
Ground terminal
15
XIN
I
Main system clock input terminal (10 MHz)
16
VCC
—
Power supply terminal (+5V)
17
NMI
I
Non-maskable interrupt input terminal Not used (fixed at “H”)
18
SCOR
I
Subcode sync (S0+S1) detection signal input from the CXD3008Q (IC101)
19
CTRL2
O
Laser power selection signal output to the CXA2568M (IC103) “H”: double speed
20
8830 HINT
I
Interrupt request signal input from the MPEG video/audio decoder (IC506)
21
NT/PAL OUT
O
NTSC/PAL select signal output to digital RGB encoder (IC514)
22
DF LATCH
O
Serial data latch pulse output to the D/A converter (IC509) “L” active
23
NC
O
Not used (open)
24
8830 RESET
O
Reset signal output to the MPEG video/audio decoder (IC506) “L”: reset
25
JOG1
I
Rotary encoder jog dial pulse input terminal Not used (fixed at “H”)
26
JOG2
I
Rotary encoder jog dial pulse input terminal Not used (fixed at “H”)
27
VMUTE
O
Video muting on/off control signal output terminal “L”: muting on
28
OSD CS
O
Chip select signal to the BU2990 (IC511)
29
I2C/RX
I/O
Communication data reading clock signal input or transfer clock signal output with the system
controller (IC101) and CPU in the STR-NX300AV
30
I2C/TX
I/O
Communication data bus with the system controller (IC101) and CPU in the STR-NX300AV
31
DATA1O
O
Serial data output to the MPEG video/audio decoder (IC506) and BU2990 (IC511)
32
DATA1I
I
Serial data input terminal Not used (open)
33
CLK1
O
Serial data transfer clock signal output to the MPEG video/audio decoder (IC506) and BU2990
(IC511)
34
RTS1
O
RTS signal to serial port terminal Not used (open)
35
NC
O
Not used (open)
36
SUBQ DATA
I
Sub-code Q data input from the CXD3008Q (IC101)
37
SUBQ CLK
O
Sub-code Q data reading clock signal output to the CXD3008Q (IC101)
38
P.ON
O
Power on/off control signal output terminal Not used (open)
39
BUS XRDY
I
Ready signal input from the MPEG video/audio decoder (IC506)
40
BUS
O
Not used (open)
41
BUS XHOLD
I
Hold signal input terminal Not used (fixed at “H”)
Содержание HTC-NX300
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