HCD-DZ30
47
IC901 STR-F6168-LF1352 (EXCEPT E87, MX MODEL) (MAIN Board (8/8))
IC901 STR-F6138-LF1352 (E87, MX MODEL) (MAIN Board (8/8))
IC602 MC14052BDR2 (IO Board)
OCP/INH
1
S/GND
2
Drain
3
Vcc
4
FB/OLP
5
+
–
+
–
+
–
+
–
+
–
Delay
OVP
TSD
Delay
Reg2
Reg1
Reg3
Current mirror
POWER
MOS FET
Latch
OSC
Boottom Skip
Logic
OCP2
Logic
Internal
Bias
OCP1
Vocp
Rg3
Rg2
Rg1
OCP2
+
–
UVL0
ON=16V
OFF=10.5V
INH1
INH2
FB
Vth1
+
–
IOLP
Volp
Vth2
Vocp(BSIN,OUT)
1
2
3
4
5
6
7
8
16
11
14
BINARY TO 1-OF-4
DECODER WITH
INHIBIT
LEVEL
CONVERTER
13
12
11
10
9
VDD
X2
X1
X
X0
X3
A
B
Y0
Y2
Y
Y3
Y1
INH
VEE
VSS
Ver. 1.3