11-7
DSR-1800/P/1600/P
73
6
15
14
12
11
MUT
ERRF
NOIN
DATI
DATO
LSBO
49
50
JRDY
JDAT
46
47
48
REF
VAR
INT
74
DSP
65
PS
16
DSPO
75
ATT
18
ATLT
17
ATC
59
61
60
62
57
58
STR1
STR2
SFP1
SFP2
OTEN
SFDR
54
FLTT
64
RESET
53
TRCK
55
FLTA
77
78
71
70
72
98
99
100
79
80
ACF
ACT
SPSO
SCK
SPSI
FSE2
FSE1
EMPA
PBON
DIIN
36
37
39
34
40
41
42
PCEZ
VEN
HEN
ERS
SLXM
SLVX
DV32
35
PRST
PEAK LEVEL METER BLOCK
MULT BUS
ADDRESS BUS
DATA BUS
A/D, D/A
INTERFACE
BLOCK
MUTING
BLOCK
CXD3104R
INTERFACE
BLOCK
RAM
INTERFACE
BLOCK
REC
BLOCK
RAM
SELF-CHECK
BLOCK
PB
BLOCK
28
7
8
9
10
FCK
LRCI
BCKI
LRCO
BCKO
CXD2912
CXD2913
INTERFACE
BLOCK
MICROCOMPUTER
INTERFACE BLOCK
IC
REVERSIBLE MOTOR DRIVER
—TOP VIEW—
1
2
3
4
5
6
7
8
9
10
11
12
13
25
24
23
22
21
20
19
18
17
16
15
14
FIN
FIN
OUT3
NC
NC
NC
IN1
IN2
GND
IN3
V
CC1
NC
NC
NC
NC
NC
NC
NC
OUT2
NC
GND
GND
OUT1
NC
V
CC2
NC
VR
5P IN1
0
1
1
0
0
1
INPUTS
OUTPUTS
6P IN2
0
0
0
1
1
1
8P IN3
0
1
0
1
0
1
0
1
18P OUT1
0
1
0
1
0
0
22P OUT2
0
0
1
OPEN
OPEN
0
1P OUT3
0
OPEN
OPEN
0
1
0
FUNCTION
BRAKE
CURRENT
OUT1 TO OUT2
CURRENT
OUT2 TO OUT1
CURRENT
OUT1 TO OUT3
CURRENT
OUT3 TO OUT2
BRAKE
0
1
: LOW LEVEL
: HIGH LEVEL
BA6247FP-YE2 (ROHM)
V
CC
2
16
V
R
14
OUT3
1
GND
OUT2
22
OUT1
18
CONTROL CIRCUIT
THERMAL
SHUTDOWN
CIRCUIT
IN1
5
V
CC
1
9
IN2
6
IN3
8
INPUT
ACF
ACT
ATT
BCKI
DATI
DSP
FCK
FLTA
FLTT
JDAT
JRDY
LRCI
MDPL
MUT
NOIN
PS
RST
SCK
SFP1, SFP2
SPSO
STR1, STR2
TCK
TDI
TENA1, TENA3
TRCK
TRST
TSAD
TSRM
TSTM
VST
OUTPUT
ATC
ATLT
BCKO
DATO
DIIN
DSPO
DV32
EMPA
ERRF
ERS
FSE1, FSE2
HEN
INT
LRCO
LSBO
OTEN
PBON
PCEZ
PRST
REF
SFDR
SLVX
SLXM
SPSI
TDO
VAR
VEN
INPUT/OUTPUT
A0 - A14
CE
D0 - D7
OE
TDAT
TSCK
TSG
WE
: MICROCOMPUTER FRAME COMMUNICATION CHIP SELECT
: MICROCOMPUTER TRACK-PAIR COMMUNICATION CHIP SELECT
: AUTO ATT INTERFACE CHIP SELECT
: 64 FS SIGNAL
: AUDIO DATA
: ADSP INTERFACE CHIP SELECT
: 256 FS CLOCK
: RECORDING FRAME SIGNAL
: TRANSFER/PLAYBACK FRAME SIGNAL
: INTERFACE
: INTERFACE
: FS SIGNAL
: (FOR TEST)
: DIRECT MUTING
: D/A THROUGH MODE AUDIO DATA
: POWER SAVE MODE
: RESET
: MICROCOMPUTER TRANSFER CLOCK
: PLAYBACK DATA
: MICROCOMPUTER COMMUNICATION DATA
: REC/PB DATA COMMUNICATION START PULSE
: (FOR TEST)
: (FOR TEST)
: (FOR TEST)
: MAIN CLOCK
: (FOR TEST)
: (FOR TEST)
: (FOR TEST)
: (FOR TEST)
: (FOR TEST)
: AUTO ATT INTERFACE CLOCK
: AUTO ATT INTERFACE LATCH PULSE
: 64 FS SIGNAL
: AUDIO DATA (MSB FIRST FORMAT)
: MICROCOMPUTER INTERFACE SERIAL/PARALLE CONVERSION
: ADSP INTERFACE CLOCK
: INTERFACE
: MICROCOMPUTER INTERFACE SERIAL/PARALLEL CONVERSION
: PB AUDIO DATA ERROR RECOGNITION SIGNAL
: RESET
: MICROCOMPUTER INTERFACE SERIAL/PARALLEL CONVERSION
: INTERFACE
: PLAYBACK PHASE CHECKING
: FS SIGNAL
: AUDIO DATA (LSB FIRST FORMAT)
: RECORDING DATA COMMUNICATION ENABLE
: MICROCOMPUTER INTERFACE SERIAL/PARALLEL CONVERSION
: INTERFACE
: INTERFACE
: PHASE COMPARATOR REFERENCE CLOCK
: RECORDING DATA
: INTERFACE
: INTERFACE
: MICROCOMPUTER COMMUNICATION DATA
: (FOR TEST)
: PHASE COMPARATOR COMPARISON CLOCK
: INTERFACE
: (FOR TEST)
: (FOR TEST)
: (FOR TEST)
: (FOR TEST)
: (FOR TEST)
: (FOR TEST)
: (FOR TEST)
: (FOR TEST)
Содержание DSR-1600P
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Страница 25: ...12 1 J DSR 1800 P 1600 P Section 12 Spare Parts and Optional Fixtures 12 1 ...
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